Intel® Many Integrated Core Architecture

MICs and VLANs

We have a VLAN that needs to be accessed via VLAN Tagging.  This is enabled
on the compute hosts as eth2.3.  I've configured eth2 as a bridge (br1) and
included the mic cards (mic0, mic1) in this bridge.  Creating br1.3 works
to route on the vlan, but the MIC hosts don't seem to support this.

Are there any packages we may be missing for VLAN support?

Two bridges

Hi guys,

We have faced with a requirement to setup two network bridges and include both MICs into the both networks (on each host of the cluster). Is it possible to implement such configuration with the latest MPSS?

Best regards,

How to align the 3D array which is dynamic allocated by new operator to 64 bytes?

Hi!

I am using pointer to dynamic allocate a 3D array like this:

double ***p;

p=new double** [x_dimension];
    for (int i=0; i<x_dimension; i++)
    {
        phi[i]=new double* [y_dimension];
        for(int j=0; j<y_dimension; j++)
        {
            phi[i][j]=new double [z_dimension];
        }
    }

How can I rewrite the code to make sure the allocated memory is 64 bytes alignment?

Thanks!

Issues accessing mic0 with non-root user

I am having some issues getting access to mic0 through non-root users. Accessing the card as root works fine.

The issue is that I keep getting prompted for password and no matter what password I generate (either an empty passphrase or an actual password) I get prompted for a password each time I try to ssh or scp but it never authenticates me and lets me log in. I can however ssh with root using an empty passphrase without any issues.

Ask the Community: LGA1150 motherboard for 31S1P

I'm interested in programming for 31S1P and want to ask:

               is there a LGA1150 motherboard that (unofficially) supports Xeon Phi?

I have MB that does not support MMIO above 4G. So I need to replace a MB at least.

I know that official supported hardware list does not contain my configuration. So, it's a question for MIC community primarily.

Speed Up with MIC/ in Parallel

My question is not specific to MIC developers, it for all parallel developers in general. 

By increasing data sampling (n) in the program, I get better speed up. Also the sequential  is better than parallel version with small (n). 

I know this is normal in parallel programming, but would you tell me why ? or give me some reasons to convince me.

 

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