Intel® Many Integrated Core Architecture

Force xeon level precision on Xeon phi or vice versa

Hi all,

I have been running a program where precision of doubles mean a lot to my program.

However due to some strange reason it seems like Xeon phi is rounding off a few bits(at 10^-8th bit) and this seems to be causing some instabilities to my model. A small round off error grows over my model over iteration of time step and my model fails to converge.

here is  some sample differences in error.

Xeon phi value

Coprocesador Intel® Xeon Phi™: catálogo de aplicaciones y soluciones


El documento PDF que se adjunta a este artículo contiene una lista, en constante aumento, de código disponible, descargable o en elaboración que se puede ejecutar en coprocesadores Intel® Xeon Phi™ o que está siendo optimizado para ejecutarse en ellos.

  • Xeon Phi
  • Intel Xeon Phi Coprocessor
  • Knights Corner
  • Knights Landing
  • MIC
  • High performance computing
  • HPC
  • HPC applications
  • Parallel Programming
  • sample code
  • application modernization
  • application optimization
  • Intel® Many Integrated Core Architecture
  • Use memory allocated in offload region on host


    This post covers two questions. I actually just need a (positive) answer for one of them, as that would be enough to solve my problem. But it would be nice to get an answer for both.

    1. Is it possible to write to disk from the offload region?

    2. How can I use memory allocated inside the offload region in the host?

    Windows External Network Bridge


    Is it possible to setup an external network bridge for the PHI on using a windows based operating system?

    This information is not provided in the User's Guide.

    I have simply highlighted the PHI and External network adapters and created a bridge.

    What are the next steps for this to work?

    Do i absolutely need to use Linux for this feature?



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