Intel® Many Integrated Core Architecture (Intel MIC Architecture)

MPSS 3.4.3 Glibc error: gethostbyname_r returns EINVAL not ERANGE


The following is a slightly modified test for the GHOST vulnerability:

#include <netdb.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>

#define CANARY "in_the_coal_mine"

struct {
  char buffer[1024];
  char canary[sizeof(CANARY)];
} temp = { "buffer", CANARY };

int main(void) {
  struct hostent resbuf;
  struct hostent *result;
  int herrno;
  int retval;

Running OpenCV Computer Vision Programs on Xeon Phi


I would like to know how to run opencv programs by using the intel xeon phi coprocessor card? What are my options? Also, how can i work with the Transparent API released by OpenCV and Xeon Phi ? Has Intel developed any module or support for running computer visions programs on the xeon phi?  Any suggestions or thoughts in this regard will be greatly appreciated.

Trying to create an external bridge

Hi guys,

I'm trying to create an external bridge following the users guide from Intel.

First of all I execute the following command:

micctrl --addbridge=br0 --type=external --ip=<ip_HOST>


Then, I can see that a file ifcfg-br0 has created and I can see the bridge created with brctl show. Also I attached the eth1 interface to the bridge br0


Then, when I try execute:


micctrl --network=static --bridge=br0 --ip=<ip_MIC0>


I always obtain this error:


[Error] Bridge 'br0' not defined

Knights Corner Architecture


I have a question about the architecture of knights corner. I wonder how many Vector Processing Unit (VPU) within one physical core? Because the hardware can support 4 threads within one core, does it that mean there are four VPUs within one core? or there is only one VPU within one core, and four threads share one VPU? I am not familiar with this, Can someone answer me ?


Thank you!


configure infiniband connection(rdma) for 2 mics

Hi, I'm trying to set up infiniband connection between host and mic, mic and mic. Host is showing this on ifconfig:

mic0:ib: flags=67<UP,BROADCAST,RUNNING>  mtu 64512
        inet  netmask  broadcast
        ether 4c:79:ba:20:06:63  txqueuelen 1000  (Ethernet)

and two: mic0 and mic1 interfaces.

I have two coprocessors installed.  I can run ib_read_bw between host and mic0, but not host and mic1 or mic0 and mic1.  Getting error:  

Received 10 times ADDR_ERROR
Unable to perform rdma_client function.

Intel LEO multiple copies of the same variable on MIC

Dear all,

I am extending SNU NPB OpenMP version to use LEO. I found a problem while converting the IS application. Considering that I do not have more than a couple of weeks of practice on LEO, I was wondering if this is a compiler bug, or a missing feature, etc. The problem is that when offloading pragma is used in/out/inout are not always respected depending on the underneath code (I am speaking about the C version): multiple copies of the same variable are created on MIC and those copies are not consistent. Here an example code:

Temperature monitoring

Hi all,

I'm trying to figure out how to read the temperature sensor(s) on the PHI from a program running on the embedded linux.

I installed MPSS version 3.4.3 and the board SKU is B1PRQ-5110P/5120D.

The Intel system software developers guide for the PHI mentions, in section, that "The processor implements internal MSRs (IA32_THERM_STATUS, IA32_THERM_INTERRUPT, IA32_CLOCK_MODULATION)".

unable to link offloaded MIC

hi all,

I had added an offload section to a file named atm_comp_mct.F90.

it does compile well.

however later it is being used to link to a file named cesm.exe and it throws errors as undefined reference.

undefined reference to `__offload_target_acquire'
undefined reference to `__offload_offload'

here are the atm_comp_mct.F90 and the buildlog for cesm.exe



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