‹ Back to Video Series: Parallel Programming and Optimization with Intel® Xeon Phi™ Coprocessors

Episode 4.1 - SIMD Parallelism and Intrinsics

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In the previous lectures, we already discussed the purpose and the architecture of Intel® Xeon Phi™ coprocessors. After that, we studied programming models for Intel Xeon Phi coprocessors: native and offload. Now we are beginning a new chapter, number 4, titled "Expressing Parallelism". In this chapter, our goal is to learn how to express data parallelism, thread parallelism and process parallelism in applications for Intel Xeon processors and Xeon Phi coprocessors.

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