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Part 1: Introduction to Intel® Xeon and Xeon Phi™ architectures

  • Overview

In Episode 1 of the “Hands-On Workshop (HOW) series on parallel programming and optimization with Intel architectures”, we introduce Intel® Xeon® Processors and Intel® Xeon Phi™ coprocessors and discuss their features and purpose.

We also begin our introduction to portable, future-proof parallel programming and discuss the pre-requisites for high performance on the Intel® Many Integrated Core Architecture (Intel® MIC Architecture):

• Thread parallelism
• Vectorization
• The optimized memory access pattern

The episode introduces the native model for programming Intel Xeon Phi coprocessors that allows us to re-use application code designed for general-purpose CPUs.

The hands-on part of the episode demonstrates how the Linux* operating system (OS) on the host inter-operates with the OS on coprocessors, and how to use Intel compilers to run native applications on coprocessors.

EPISODES (21)
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Greg S.'s picture

A request, please consider using something besides the Flash player to display videos (HTML 5 is pretty trendy now), as those of us who have sworn off of Flash can't see them. And thanks for the download option as a workaround!

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