Slow LEA Stalls

Metric Description

Some instructions have increased latency in Intel microarchitecture code name Sandy Bridge. Some LEA instructions, most notably three-operand LEA instructions, have increased latency and reduced dispatch port choices compared to other LEAs. This metric estimates the performance penalty of such slow LEAs.

Possible Issues

A significant proportion of cycles were spent handling slow LEA operations. Use the source view to discover the responsible instructions and try to avoid their use.

For more complete information about compiler optimizations, see our Optimization Notice.
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