Flow Graph Analyzer

Visualize Parallelism

Graphically represent and analyze your application’s critical path performance. Starting with a blank canvas, construct a flow graph application by interactively adding nodes and edges through a graphical interface.

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User Guide | Featured Documentation

Model Graphs in a Heterogeneous World

Flow Graph Analyzer (FGA) is a rapid visual prototyping environment. It assists developers with analyzing and designing parallel applications that use the Intel® Threading Building Blocks (Intel® TBB) flow graph interface.

  • Speed up algorithm design and express parallelism efficiently
  • Plan, validate, and model application design and performance before generating Intel TBB code
  • Create parallel applications that take advantage of multicore and heterogeneous systems
  • Pinpoint your performance tuning efforts by using the critical path analysis to reduce the set of nodes (even large graphs) to focus on

Who is FGA for?

Any developer with Intel TBB flow graph applications or whose applications can be expressed as flow graphs can benefit from this tool. FGA is available as a feature of Intel® Advisor and can be accessed from its interface or downloaded from the Registration Center.

Key Specifications


  • IA-32 or Intel® 64 architecture that supports Intel® Streaming SIMD Extensions SSE2 and Intel® HD Graphics 4000 or higher.

Supported operating systems:

  • Windows*
  • Linux*

Development environment:

  • Microsoft Visual Studio* integration

Supported compilers:

  • Compilers from Intel
  • Microsoft Visual C++* compiler
  • GNU Compiler Collection (GCC)*
  • Other compilers that follow the same standards

Full Specifications

Key Features

FGA consists of three workflows that let developers design, validate, model, implement, and analyze the flow graphs they build.

example of a diagram

Design: Visually create a parallel algorithm and generate TBB C++ code.

Design Workflow

Create Intel TBB flow graph diagrams and generate C++ stubs as a starting point for further development. Employ a drag-and-drop paradigm for interactively constructing Intel TBB graphs.

example of the technical preview

Model: Estimate and project scalability of your flow graph for performance.

Modeling Workflow

The technical preview feature is available in limited capacity and only supports dependency graphs. Use this workflow between the design and analysis steps to project the scalability of a dependency graph and iteratively refine the graph topology to maximize scalable performance.

example of the analyzer U I

Analyze: Visually assess your Intel TBB flow graph applications.

Analyzer Workflow

Collect and visualize execution traces from Intel TBB flow graph applications. From FGA, you can explore the topology of your graphs, interact with a timeline of node executions, and project important statistics onto graph nodes.

Si desea conocer información más detallada sobre optimización de los compiladores, lea nuestro Aviso de optimización.