Intel® Software Development Products Technical Presentations

For current technical presentation information, please go to http://software.intel.com/en-us/dpd-events

 

 

Spend a few minutes to jump start your product experience. Please join us for one of the following Intel® Software Development Products technical presentations. These one hour presentations give you a chance to view a short live presentation or demo and then ask questions to our support engineers either about the presentation/demo or about anything related to using the product presented.

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Upcoming Technical Presentations


Watch here for upcoming presentations

 

Past Technical Presentations



Improve Performance with Intel® Cilk™ Plus

Interested in some simple ways to add performance to your C++ applications?  This webinar addresses advances in vectorization and parallelization made possible with Intel® Cilk™ Plus, an easy-to-use part of the Intel® C++ Compiler.  This technical talk will show how to use Cilk Plus, with code samples, to implement task and vector parallelism.  The simple techniques used in this webinar show you how to take full advantage of the performance offered by contemporary SIMD-compute engines and multi-core processor configurations that are part of Intel and Intel-compatible processors.  If you program in C++ and care about performance, sign up and attend this webinar.

Recording Available (Windows viewable only) 
Presented:  Tuesday, June 26, 2012
Presentation Slides (PDF format)


Future-Proof Your Application's Performance With Vectorization

You’ve heard of using parallelism to run your application across multiple cores. Vectorization is another level of parallelism that occurs within 1 CPU core – it enables one instruction to operate on multiple pieces of data at the same time. Vectorization is an important contributor to performance on current x86 processors, including the 2nd Generation Intel® Core™ Processor Family, and is vital for performance on future processors such as the Intel® Many Integrated Core (Intel® MIC) architecture. Understanding how to vectorize your applications now will allow much easier migration to future processor architectures. Scientific, engineering, and multimedia applications are all potential candidates for this technology.

This presentation is for C, C++, and Fortran developers, and will help you get started understanding and evaluating vectorization using new technologies such as Intel® Cilk Plus, pragma SIMD and the Intel Compiler’s Guided Auto Parallelization report. We will also discuss the pros and cons of various techniques and usages.

As a special benefit for live attendees, you will also have the opportunity to request a follow-up with an Intel vectorization expert! Don’t miss this opportunity to position your application for the future! 

Recording and Q&A Available
Presented:  Wednesday, February 15, 2012

Analysis of hybrid applications with the Intel Cluster Studio XE 2012

With the launch of Intel® Cluster Studio XE 2012, Intel enhanced the premium software development tools package for clusters with the inclusion of MPI support in Intel® Parallel Studio XE, and added new features for better scalability and improved performance. This session will introduce you to all MPI components of the new Intel® Cluster Studio XE 2012. You’ll learn how to use the new and more scalable startup mechanism to run MPI applications well up to 90000 cores, you’ll take a dive into benchmark data, and the improvements and details of the mpitune tool, and you’ll see, in an interactive demo, key elements and new scalability features of Intel® Trace Analyzer and Collector. Finally, you’ll be shown how to enable the new MPI support in the Intel® VTune™ Amplifier XE and Intel® Inspector XE tools.

Recording available (Windows viewable only)
Presented:
Wednesday, December 7, 2011 9:00 AM - 10:00 AM PST
Presentation slides (PDF format)

Using Intel® VTune™ Amplifier XE to Tune Software on Intel® Microarchitecture Codename Sandy Bridge, Part 2: Common Issues & Tuning Suggestions

This webinar is the second part of our 2-part series on Using Intel® VTune™ Amplifier XE to Tune Software on Intel® Microarchitecture Codename Sandy Bridge. We recommend you watch part 1 first unless you are already familiar with the VTune Amplifier XE Sandy Bridge interface and the pipeline slots methodology. This technical presentation will discuss common performance issues, how to measure their impact on Sandy Bridge, and specific suggestions for resolving each.

Presented: Wednesday, November 9, 2011 9:00 AM - 10:00 AM PST
Recording available (Windows viewable only)
Presentation slides (PDF format)

Using Intel® VTune™ Amplifier XE to Tune Software on Intel® Microarchitecture Codename Sandy Bridge, Part 1: Methodology & Interface.

Presented:
Tuesday, November 8, 2011 9:00 AM - 10:00 AM PST
Recording Available (Windows viewable only)
Presentation slides (PDF format)

This technical presentation is part of a 2-part series on Using Intel® VTune™ Amplifier XE to Tune Software on Intel® Microarchitecture Codename Sandy Bridge. Part 1 will discuss the VTune Amplifier XE and its new features specifically for performance analysis on Sandy Bridge. It will also detail our general performance tuning methodology, based on hotspots. The final section will cover the Sandy Bridge microarchitectural details you need to understand to get the most from our Sandy Bridge tuning guide and interface.

Using Intel® Inspector XE with Fortran Applications

This technical presentation will present an overview of the powerful correctness and security checking features of Intel® Inspector XE. There will be a focus on using Intel Inspector XE on Fortran applications. The presentation will include example problems detected by the memory, threading, and static security analysis tools as well as some possible solutions. For more details, please check the following blog post.

Presented: Wednesday, Aug 17, 2011, 9:00 AM - 10:00 AM PDT
Recording Available (Windows viewable only)
Presentation slides (PDF format)

Modeling parallelism with Intel® Parallel Advisor


An application written in a sequential language like C++ can be understood in two ways. It can be understood as an exact specific of how a program must execute, or it can be understood as a specification of the kinds of computations that must be performed. In the Parallel Advisor, we exploit the second interpretation by introducing a modeling language that can be embedded into your sequential application. This modeling language allows you to precisely specify where and how the sequential execution of your application is over-constrained and what flexibility you are willing to utilize to harness parallel execution. This talk will describe the modeling language, show the benefits of parallel modeling over parallel execution, and illustrate the correspondence of the parallel modeling language to common idioms available in Intel® Threading Building Blocks and Intel® Cilk™ Plus.

Presented: Thursday, July 21, 2011, 9:00 AM - 10:00 AM PDT
Recording Available (Windows viewable only)
Presentation slides (Powerpoint format)

Intel® Parallel Advisor 2011 Shows Its Stuff on Duplo

Intel® Parallel Advisor 2011 provides the information and the tools needed by any C/C++ programmer to add safe and effective parallelism to their programs. This is demonstrated by applying Advisor to Duplo, a serial, open-source application for finding duplicate blocks of code in a set of source files. Parallel Advisor is a component of Intel® Parallel Studio 2011 and is a free download for Intel® Parallel Studio XE. It is integrated into Microsoft Visual Studio*.

In this presentation, you will learn how to:
• Find the places in Duplo where parallelism can be usefully added
• Find and replace the parts of Duplo that prevent parallelism
• Test the revised version of Duplo for parallel correctness and performance
• While keeping Duplo serial through these steps!
• Implement the parallelism using Intel® Cilk™ Plus

Along the way we discover an unexpected opportunity to improve the serial performance by 30%. We also encounter two ordering dependencies that almost derail parallelization, until Cilk’s hyperobjects come to the rescue. Finally, we see how closely Advisor’s parallel performance estimates match the actual speed-ups of the parallel version of Duplo.

Presented: Thursday, July 21, 2011, 9:00 AM - 10:00 AM PDT
Recording Available (Windows viewable only)
Presentation slides (Powerpoint format)

Choosing Where To Introduce Parallelism (using Intel® Parallel Advisor 2011)



The Intel® Parallel Advisor 2011 has a feature that surveys your running program and shows you cumulative time spent within functions and loops. Learn how to combine this information with your knowledge of the program to decide where to invest your time adding parallelism. The presenter Bevin Brett will describe how you should consider both program structure and data structure as you make this decision.

Presented: Wednesday, March 23, 2011, 9:00 AM - 10:00 AM PDT
Recording Available (Windows viewable only)
Presentation slides (Powerpoint format)

Topic: Getting More out of your CPU – Using Intel® C++ Composer XE to Maximize Code Vectorization and Improve Application Performance

SIMD (Single Input – Multiple Data) Instructions have long been an important performance feature of Intel (and Intel-compatible) CPUs. Now, with the introduction of the Sandy Bridge processor family and its support for the new Intel® Advanced Vector Extensions (Intel® AVX) instructions, taking advantage of these instructions remains one of the best ways to optimize for performance. In this technical presentation, we will show how you can use the state of the art auto-vectorizer provided with Intel® C++ Composer XE to generate these instructions for you automatically from high level C++, and how you as the programmer can encourage Composer XE to generate efficient code even when using traditionally vectorization-unfriendly codes like arrays of structures or mixed datatypes.

Presented: March 15, 2011

Recording Available  (Windows viewable only)

Presentation slides (Powerpoint format)

Kernel Template Library Code Examples



Topic: Intel® ArBB Code Tips II – A compilation of best practices and useful hints



Thanks to our user base and increasing community we extend the first Intel® Array Building Blocks (Intel® ArBB) "Code Tips" webinar. In this webinar, we discuss best practices including:

• How to develop in immediate mode and later "toggle" to production/JIT code
• How to get initial data into a container (memory mapping and binding)
• How to update the values of a containers according to an index

We share code examples, background information, and insight to our design decisions. This webinar is great for developers who want to have a fresh start after some initial steps, or people who are preparing to have a look at Intel ArBB. It is also a great chance to ask questions of Intel ArBB engineers and experts during and after this webinar.

Presented: February 22, 2011


Recording available

Presentation available



Topic: Intel® Parallel Building Blocks: Quickly Manipulate Data in Parallel Using Intel® Cilk™ Plus Array Notation/Elemental Functions

As multicore systems become prevalent on desktops, servers and laptop systems, new performance leaps will come as the industry adopts parallel programming techniques. However, many parallel environments consist of confusing, complex and error-prone rules and constructs. The Intel Cilk Plus language, built on the Cilk technology developed at M.I.T. over the past two decades, is designed to provide a simple, well-structured model that makes development, verification and analysis easy. Because Intel Cilk Plus is an extension to C and C++, programmers typically do not need to restructure programs significantly in order to add parallelism.

This technical presentation will focus on examples showing the benefits of using Cilk Plus array notation and elemental functions to define operations that can be run of multiple data elements simultaneously using the underlying Intel® Streaming SIMD Extensions provided by Intel® CPUs.

Presented: February 1, 2011


Recording available

Presentation available



Topic: Intel® Parallel Building Blocks: Quickly Write Parallel Tasks Using Intel® Cilk™ Plus Keywords and Reducers


As multicore systems become prevalent on desktops, servers and laptop systems, new performance leaps will come as the industry adopts parallel programming techniques. However, many parallel environments consist of confusing, complex and error-prone rules and constructs. The Intel Cilk Plus language, built on the Cilk technology developed at M.I.T. over the past two decades, is designed to provide a simple, well-structured model that makes development, verification and analysis easy. Because Intel Cilk Plus is an extension to C and C++, programmers typically do not need to restructure programs significantly in order to add parallelism.

This technical presentation will focus on examples showing the benefits of using the Cilk Plus keywords cilk_spawn, cilk_for and cilk_sync along with Cilk Plus reducers such as reducer_opadd to define tasks that can be run on different cpu cores in parallel.

Presented: January 18, 2011

Recording Available

Q&A and Presentation Available


Topic: What's New with Intel® Fortran Composer XE 2011?


Aside from the obvious name change, Intel® Fortran Composer XE 2011 launched in early November brings many new features to Intel's Fortran implementation. In this technical presentation, Steve Lionel and Ron Green from Intel's Fortran Support team discuss the new Fortran features added in Intel Fortran, including our exciting new Coarray Fortran implementation. This webinar also gives Intel Fortran users a chance to ask questions about the product, the name change, and directions for Intel Fortran going forward.

Presented: December 14, 2010

Recording Available


Topic: Intel ArBB Code Tips

This webinar is an intermediate-level talk for users who have had some experience with Intel® Array Building Blocks. But new users may also benefit from it by getting a jump start on programming Intel® ArBB. During this one-hour presentation, we are sharing many code tips to cover the following topics:

1. How to express parallelism using container operations and the arbb::map() function
2. User defined types and functions
3. How to program for performance
4. Pitfalls and misuses to avoid

Presented: December 9, 2010

Recording and Presentation Slides Available


Topic: Accelerate your multimedia and data processing application with the Intel® Integrated Performance Primitives (Intel® IPP) 7.0

The Intel® IPP library is a collection of highly optimized software functions for use with a wide range of applications, including digital media, signal processing and data-processing applications and is included as a component within the Intel Parallel Studio developer's toolkit.

This webinar will cover key new features and changes that are part of the IPP 7.0 release, and provide a review of the drop-in high-level data compression libraries now included with the Intel IPP library: ipp_zlib, ipp_bzip2, ipp_gzip and ipp_lzopack. New features in the Intel® Intel® IPP 7.0 library, include:

• Data Compression Library support
• JPEG-XR support and imaging performance improvements
• Optimizations for the 256-bit AVX SIMD instruction set
• Intel® AES-NI (cryptography) optimizations

Presenter: Paul Fischer
Presented: November 18, 2010

Recording and Q&A Available


Topic: Super Charge Applications with Intel® Integrated Performance Primitives – A Component of Intel® Parallel Studio 2011

Intel® Integrated Performance Primitives (Intel® IPP) is an extensive library of multicore-ready, highly optimized software functions for digital media and data-processing applications and comes with Intel Parallel Studio 2011 and Intel® Parallel Composer 2011. We will show how to set up an application to use Intel IPP from within Intel Parallel Studio, what kind functions the library has to offer and an example of the performance benefits from using the library.

Presenter: Walter Shands
Presented: October 26, 2010

Recording and Q&A Available



Topic: Intel® Array Building Blocks Technical Presentation: Introduction and Q&A

Intel® Array Building Blocks provides a generalized data parallel programming solution that frees application developers from dependencies on particular hardware architectures. It offers an API that allows parallel algorithms to be expressed at a high level. Its dynamic compiler and runtime produce scalable, portable and deterministic parallel implementations from the single high-level source. This technical presentation is an introduction to Intel ArBB. We will discuss the main features of Intel ArBB, and walk through some sample code to demonstrate the benefits such as forward-scaling, safety-by-design, and ease-of-use. There will be a Q&A session at the end of the presentation to answer any questions you have for Intel ArBB.

Presenters: Noah Clemons
Presented: October 14, 2010

Recording available



Topic: Adding Parallelism with Intel® Parallel Advisor 2011: No Parallelism Experience Required

Intel® Parallel Advisor 2011 provides the information and the tools needed by any C/C++ programmer to add safe and effective parallelism to their programs. Parallel Advisor is a component of Intel® Parallel Studio 2011 and is integrated into Microsoft Visual Studio*.

In this presentation, you will learn how to:
• Find the places in the program where parallelism can be usefully added
• Find and replace the parts of the program that prevent parallelism
• Test the revised program for parallel correctness and performance
• Keep the program serial through these steps
• Add parallelism to code samples / examples

Presenter: Mark Davis
Presented: October 12, 2010

Recording available



Topic: Introduction to Intel® Cilk™ Plus

Intel® Cilk Plus, one of the Intel® Parallel Building Blocks which includes Intel® Threading Building Blocks and Intel® Array Building Blocks, provides C/C++ language extensions to implement parallelism in your application simply and efficiently. This technical talk will cover this new syntax, supported by the C++ compiler in Intel® Parallel Composer, and how it provides an easy way to use task and vector parallelism to take full advantage of multiple cores and the SIMD-compute engine on CPUs.

Presenter: Brandon Hewitt
Presented: September 28, 2010

Recording available



Topic: Introducing Intel® Parallel Building Blocks

This technical presentation will introduce three methods for adding parallelization to your serial application: Intel® Threading Building Blocks, Intel® Cilk™ Plus, and Intel® Array Building Blocks. The methods will be compared showing where each will be most beneficial and to what types of applications. In addition to the presentation there will be a brief demo followed by time for Q&A on these threading methods or any other questions you might have about using Intel® Parallel Studio.

Presenter: Noah Clemons
Presented: September 23, 2010

Recording available


Topic: Introducing Intel Parallel Inspector

Intel® Parallel Inspector is a serial and multithreading error checking analysis tool for Microsoft Visual Studio* C/C++ developers. Inspector detects challenging memory leaks and corruption errors as well as threading data races and deadlock errors. This comprehensive developer productivity tool pinpoints errors and provides guidance to help ensure application reliability and quality. This technical presentation will include an overview of the tool, live demo, and Q&A session. You are welcome to ask questions about any part of Intel® Parallel Studio during the Q&A session.

Presenter: Jackson Marusarz
Presented: August 19, 2010

Recording available


These webinars are part of a program from the Intel® Software Development Products technical consulting team to deliver technical presentations to customers.

Para obtener más información sobre las optimizaciones del compilador, consulte el aviso sobre la optimización.