Previous blogs on power management and a host of other power management resources can be found in, “List of Useful Power and Power Management Articles, Blogs and References” at http://software.intel.com/en-us/articles/list-of-useful-power-and-power-management-articles-blogs-and-references. See [LIST] below in the reference section.
HOW DO WE CONFIGURE COPROCESSOR POWER MANAGEMENT
Depending upon your suite of workloads, the size of your data center, its configuration, as well as other considerations, you may want to configure your power management (PM) differently from the default. See the previous blogs in this series. You can do this in two ways, either at boot time or at runtime using the micsmc application.
micsmc is the Intel® MIC System Management and Configuration application. It allows a user on the host to monitor and configure coprocessors attached to the host. It also has a command line version allowing scripts to do much the same.
To graphically view power status, and to enable and disable power management states on coprocessors attached to a host, you need to use a graphical window manager, such as FVWM* or GNOME*, to log into the host system. Log in as root, run the usual “compilervars.sh intel64”, and execute micsmc. You can run micsmc from a user account to monitor coprocessors, but you cannot change PM states. If you want to be able to change PM states, you need to have superuser privileges.
# source /opt/intel/composer_xe_2013_sp1/bin/compilervars.sh intel64 # micsmc & #
This brings up the monitoring console. See Figure GUI below. Not surprisingly, clicking on ‘Advanced’ => ‘Settings’ brings up the “Advanced Settings” window. The advanced settings window allows you to change the PM behavior of the cards, as well as reset and reboot the cards.
Figure GUI. micsmc management console.
For more information on micsmc, see the Intel® Xeon Phi™ Coprocessor Platform Status Panel User Guide [GUIDE]. This is not available on IDZ (Intel® Developer Zone) but is in the Intel® Manycore Platform Software Stack (Intel® MPSS) installation on the host. As of January, 2014, its Linux* location is under /usr/share/doc/sysmgmt. As in all things software except for Fortran95 numerical libraries, directory locations are ethereal and will no doubt change at some point.
GUI USAGE: MONITORING POWER
There are no readable PM PMU events (Power Management Performance Monitoring Unit events) in the current 1st generation Intel Xeon Phi coprocessor. This is likely to change in later generations. micsmc gets its temperature readings from off chip monitoring sensors on the circuit board supporting the processor. As such, it is an aggregate and approximate measurement.
Figure WINS shows a screen capture of the 3 types of monitoring windows in micsmc. The top window is the global measure of all the cards in the system, in this case there are two.
I will cover how this aggregate measurement is obtained in a subsequent blog series on measuring power.
Figure WINS. Power monitoring from the micsmc GUI.
The various measurements are pretty obvious. I will not bother to explain them. The only thing I will mention is the miniature plots you can see in the upper right-hand side of each coprocessor’s status window. Even though it is not obvious, there are 3 pages of information that you can view for each coprocessor: “micn: Utilization View,” “micn: Historical Utilization View,” and “micn: Core Histogram View”. Those little figures/buttons in the upper right corner allow the viewer to switch between them. Personally, I do not find this particularly intuitive. If you are on one page, buttons for the other two are in the upper right-hand corner. This means the buttons in that corner change depending upon which page you are viewing. The three possible status page buttons are conveniently shown in Figure BUTTONS.
Figure BUTTONS. Buttons for the 3 different coprocessor status pages: “Historical Utilization”, “Histogram”, and “Utilization” views.
Again, for more detailed information on each, see the documentation in reference [GUIDE].
GUI USAGE: CONFIGURING POWER
As you can see from Figure GUI above, we have a configuration row of check boxes for each card. For example, let us say you cannot tolerate the latency of the deepest power saving state, PC6. You can uncheck the PC6 box. See reference [LIST] for a more complete description of the different PM power states. With the exception of Turbo, you will need to reboot and restart the coprocessor for the changes to take effect. You can either do this with the “Restart All Cards” button, or do it by hand using a command-line (See Figure RESET below). The advantage of doing this by hand is that it affects one card and not the others.
knightscorner1:/etc/mpss # micctrl --reset mic0 mic0: resetting knightscorner1:/etc/mpss # micctrl --boot mic0 mic0: booting /usr/share/mpss/boot/bzImage-knightscorner knightscorner1:/etc/mpss # micctrl --status mic0: online (mode: linux image: /usr/share/mpss/boot/bzImage-knightscorner) mic1: online (mode: linux image: /usr/share/mpss/boot/bzImage-knightscorner) knightscorner1:/etc/mpss # history | tail knightscorner1:/etc/mpss #
Figure RESET. Manually resetting and rebooting only mic0.
To show the doubters in the audience that the settings do indeed change the PM state of the cards, I give to you Figure DISABLE below. Let us first look at the coprocessors’ core temperatures. The cards are inactive so they should be in their lowest power state. mic0 cannot drop into the lowest power state since core-C6 is disabled. In contrast, mic1 can. We should therefore see mic0 run hotter than mic1. This is indeed what happens. In the figure, you can see the resulting effect in the core temperatures of both. mic0 has a core temperature that is higher (60°C) than mic1 (47°C). Similarly, the power usages of both cards reflect this difference (120W for mic0 vs 89W for mic1).
Just a note about Turbo: Not all SKUs (i.e. product lines versions) of the coprocessor support Turbo. If yours does not, you will get a “Turbo Mode not supported on one or more devices” message. If you want Turbo, you will have to purchase a more capable (i.e. more expensive) SKU. Check with your friendly neighborhood OEM for details.
Figure DISABLE. Effect of disabling mic0 core C6.
GUI USAGE: CONFIGURING POWER
There is a configuration file for the micsmc GUI, MicSmcGUI.ini, located at ~/.config/Intel\ Corp/. As you would expect, there is a lot of configuration information in there. Figure INIT shows the section containing the PM configuration settings.
[MicSettingsCpuStat] coreUsageDialEnable=true coreUsageGraphEnable=true tempDialEnable=true freqDialEnable=true powerGraphEnable=true coreMemoryBarEnable=true turboModeEnable=true ledAlertEnable=true eccModeEnable=true powerStatecpf=truepowerStateco6=truepowerStatepc3=truepowerStatepc6=true cardUtilGraphEnable=true coreUtilGraphEnable=true coreHistogramEnable=true powerBarEnable=true tempDisplayEnable=true coreTempLimit=85
Figure INIT. micsmc GUI initialization settings in MicSmcGUI.ini
Though having pointed out the PM settings in the MicSmcGUI.ini file, I have not been able to determine what they do. The settings do not seem to affect what PM options micsmc makes available, what PM status you can see, or the initial settings of the Advanced Settings dialog (which cannot become active until the card is rebooted anyway). If and when I can find out what the settings do, I will update this blog as well as add it as a comment.
NEXT: THE COMMAND-LINE MICSMC
In my next blog, I will take a look at the command-line version of micsmc. It has more capability, as you would expect, and can display more information. Of course, as is the case with all command-line implementations, it is a bit harder to use.
[GUIDE] Corporate, 2013, Intel Xeon Phi Coprocessor Platform Status Panel User Guide, revision 1.2, Intel® Corporation, Intel® MPSS for Linux* installation tree under /usr/share/doc/sysmgmt (August 26th, 2013)
[LIST] Kidd, Taylor, 2013, List of Useful Power and Power Management Articles, Blogs and References, Intel Corporation, http://software.intel.com/en-us/articles/list-of-useful-power-and-power-management-articles-blogs-and-references (October 23rd, 2013).