Conversion Intrinsics

The prototypes for Intel® Streaming SIMD Extensions (Intel® SSE) intrinsics for conversion operations are in the xmmintrin.h header file.

To use these intrinsics, include the immintrin.h file as follows:

#include <immintrin.h>

The results of each intrinsic operation are placed in a register. This register is illustrated for each intrinsic with R or R0-R3. R0, R1, R2, and R3 each represent one of the four 32-bit pieces of the result register.

Intrinsics marked with * are implemented only on Intel® 64 architectures. The rest of the intrinsics are implemented on both IA-32 and Intel® 64 architectures.

Intrinsic Name

Operation

Corresponding
Intel® SSE Instruction

_mm_cvtss_si32

Convert to 32-bit integer

CVTSS2SI

_mm_cvtss_si64*

Convert to 64-bit integer

CVTSS2SI

_mm_cvtps_pi32

Convert to two 32-bit integers

CVTPS2PI

_mm_cvttss_si32

Convert to 32-bit integer

CVTTSS2SI

_mm_cvttss_si64*

Convert to 64-bit integer

CVTTSS2SI

_mm_cvttps_pi32

Convert to two 32-bit integers

CVTTPS2PI

_mm_cvtsi32_ss

Convert from 32-bit integer

CVTSI2SS

_mm_cvtsi64_ss*

Convert from 64-bit integer

CVTSI2SS

_mm_cvtpi32_ps

Convert from two 32-bit integers

CVTTPI2PS

_mm_cvtpi16_ps

Convert from four 16-bit integers

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_mm_cvtpu16_ps

Convert from four 16-bit integers

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_mm_cvtpi8_ps

Convert from four 8-bit integers

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_mm_cvtpu8_ps

Convert from four 8-bit integers

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_mm_cvtpi32x2_ps

Convert from four 32-bit integers

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_mm_cvtps_pi16

Convert to four 16-bit integers

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_mm_cvtps_pi8

Convert to four 8-bit integers

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_mm_cvtss_f32

Extract

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_mm_cvtss_si32

int _mm_cvtss_si32(__m128 a);

Converts the lower SP FP value of a to a 32-bit integer according to the current rounding mode.

R

(int)a0

_mm_cvtss_si64

__int64 _mm_cvtss_si64(__m128 a);

Converts the lower SP FP value of a to a 64-bit signed integer according to the current rounding mode.

Note

Use only on Intel® 64 architecture.

R

(__int64)a0

_mm_cvtps_pi32

__m64 _mm_cvtps_pi32(__m128 a);

Converts the two lower SP FP values of a to two 32-bit integers according to the current rounding mode, returning the integers in packed form.

R0

R1

(int)a0

(int)a1

_mm_cvttss_si32

int _mm_cvttss_si32(__m128 a);

Converts the lower SP FP value of a to a 32-bit integer with truncation.

R

(int)a0

_mm_cvttss_si64

__int64 _mm_cvttss_si64(__m128 a);

Converts the lower SP FP value of a to a 64-bit signed integer with truncation.

Note

Use only on Intel® 64 architecture.

R

(__int64)a0

_mm_cvttps_pi32

__m64 _mm_cvttps_pi32(__m128 a);

Converts the two lower SP FP values of a to two 32-bit integer with truncation, returning the integers in packed form.

R0

R1

(int)a0

(int)a1

_mm_cvtsi32_ss

__m128 _mm_cvtsi32_ss(__m128 a, int b);

Converts the 32-bit integer value b to an SP FP value; the upper three SP FP values are passed through from a.

R0

R1

R2

R3

(float)b

a1

a2

a3

_mm_cvtsi64_ss

__m128 _mm_cvtsi64_ss(__m128 a, __int64 b);

Converts the signed 64-bit integer value b to an SP FP value; the upper three SP FP values are passed through from a.

Note

Use only on Intel® 64 architecture.

R0

R1

R2

R3

(float)b

a1

a2

a3

_mm_cvtpi32_ps

__m128 _mm_cvtpi32_ps(__m128 a, __m64 b);

Converts the two 32-bit integer values in packed form in b to two SP FP values; the upper two SP FP values are passed through from a.

R0

R1

R2

R3

(float)b0

(float)b1

a2

a3

_mm_cvtpi16_ps

__m128 _mm_cvtpi16_ps(__m64 a);

Converts the four 16-bit signed integer values in a to four SP FP values.

R0

R1

R2

R3

(float)a0

(float)a1

(float)a2

(float)a3

_mm_cvtpu16_ps

__m128 _mm_cvtpu16_ps(__m64 a);

Converts the four 16-bit unsigned integer values in a to four SP FP values.

R0

R1

R2

R3

(float)a0

(float)a1

(float)a2

(float)a3

_mm_cvtpi8_ps

__m128 _mm_cvtpi8_ps(__m64 a);

Converts the lower four 8-bit signed integer values in a to four SP FP values.

R0

R1

R2

R3

(float)a0

(float)a1

(float)a2

(float)a3

_mm_cvtpu8_ps

__m128 _mm_cvtpu8_ps(__m64 a);

Converts the lower four 8-bit unsigned integer values in a to four SP FP values.

R0

R1

R2

R3

(float)a0

(float)a1

(float)a2

(float)a3

_mm_cvtpi32x2_ps

__m128 _mm_cvtpi32x2_ps(__m64 a, __m64 b);

Converts the two 32-bit signed integer values in a and the two 32-bit signed integer values in b to four SP FP values.

R0

R1

R2

R3

(float)a0

(float)a1

(float)b0

(float)b1

_mm_cvtps_pi16

__m64 _mm_cvtps_pi16(__m128 a);

Converts the four SP FP values in a to four signed 16-bit integer values.

R0

R1

R2

R3

(short)a0

(short)a1

(short)a2

(short)a3

_mm_cvtps_pi8

__m64 _mm_cvtps_pi8(__m128 a);

Converts the four SP FP values in a to the lower four signed 8-bit integer values of the result.

R0

R1

R2

R3

(char)a0

(char)a1

(char)a2

(char)a3

_mm_cvtss_f32

float _mm_cvtss_f32(__m128 a);

Extracts a SP floating-point value from the first vector element of an __m128. It does so in the most efficient manner possible in the context used.

Para obtener información más completa sobre las optimizaciones del compilador, consulte nuestro Aviso de optimización.