Multiply-adds negated scalar double-precision floating-point values of three float64 vectors. The corresponding FMA instruction is VFNMADD<XXX>SD, where XXX could be 132, 213, or 231.


extern __m128d _mm_fnmadd_sd(__m128d a, __m128d b, __m128d c);



float64 vector used for the operation


float64 vector also used for the operation


float64 vector also used for the operation


Performs a set of scalar SIMD negated multiply-add computation on scalar double-precision floating-point values in the low 64-bits of three source operands, a, b, and c. The float64 values in two operands, a and b, are multiplied and the negated infinite precision intermediate result obtained is added to the float64 value in the third operand, c. The final result is rounded to the nearest float64 value.

The compiler defaults to using the VFNMADD213SD instruction and uses the other forms VFNMADD132SD or VFNMADD231SD only if a low level optimization decides it as useful or necessary. For example, the compiler could change the default if it finds that another instruction form saves a register or eliminates a move.


Result of the negated multiply-add operation.

Para obtener información más completa sobre las optimizaciones del compilador, consulte nuestro Aviso de optimización.