core2duo cache miss penalty

core2duo cache miss penalty

Imagen de tanvis

What is the L1 and L2 cache miss penalty for core2duo (in cycles) I have a
intel core2duo cpu t5750 @2ghz Is there any product specification document where i can find this information? I have googled my query and mostly following assumptions were made by people working on core2duo 1. L1=3 cycle, L2=14 cycles. 2. L1=1 cycles, L2=10 cycles. and thirdly this paper gives L1 = 10 and L2=165 cycles. Is there any way i can measure the penalty using vtune events ? Please help !!!

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Imagen de Peter Wang (Intel)

Here is the article for your reference. Page 8 gives penalty cycles for L1 and L2 miss on Intel Core2 Duo processors. -Peter

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