#SS in #SS

#SS in #SS

I want to know how CPU behave when there's no stack available(SS:ESP points to an virtual address which is not mapped to physical memory). The environment is in protection-mode. Following is my understanding:

Because there's no PTE for stack, the instruction "push eax" will result in a #SS. Responding to this #SS, the CPU will push EFLAGS, CS, EIP and ERROR_CODE into stack and turn to exception handler. But the new push will generate new #SS for the same reason... and the process will deadlock here.

Is my understanding correct?

Thanks,
Min

Message Edited by minwang on 11-23-2004 06:23 PM

Message Edited by minwang on 11-23-2004 06:24 PM

Message Edited by minwang on 11-23-2004 06:31 PM

Message Edited by minwang on 11-24-2004 03:02 PM

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Our engineers would like to know which CPU(s) you are specifically asking about. Thanks in advance for your clarification.

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Message Edited by intel.software.network.support on 12-02-2005 01:11 PM

I would not think a deadlock would occur becuase the I think the CPU is already acknowledged it's generating an exception, if an exception occurs whilst in one a double fault occurs resulting in a CPU reset. Not sure if all models do that.

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