Clarifying MPSS source code package

Clarifying MPSS source code package

Hi!

I'm attempting to dissec the source code package of MPSS in order to understand the way which MPSS is distributed from a source code point of view.

This study is based on the last download MPSS distribution for Red Hat:

"MPSS Gold Update 3 Hotfix 1 Driver Revision: 2.1.6720-15 / Jun 27, 2013"
3b8c044b37a1a0ac2ce743d4e263d39a mpss_gold_update_3_src-2.1.6720-15_rhel.tar

The source code for SuSe Linux distribution has minor changes in the source code, mainly the SPEC files for RPM packages building.

The source code package tree:

mpss_gold_update_3/gpl:

package-cross-k1om.tar.bz2 

package-full_src-k1om.tar.bz2

mpss_gold_update_3/src:
binutils.tar.xz
cdt-src.tar.gz
coi.src.tar.bz2
gcc.tar.xz
gdb-src.tar.gz
glibc.tar.xz
intel-mic-ganglia-2.1.6720-15.el6.src.rpm
intel-mic-kmod-2.1.6720-15.el6.src.rpm
intel-mic-micmgmt-2.1.6720-15.el6.src.rpm
intel-mic-ofed-card-6720-15.el6.src.tar.gz
intel-mic-ofed-ibpd-6720-15.el6.src.rpm
intel-mic-ofed-kmod-6720-15.el6.src.rpm
intel-mic-ofed-libibscif-6720-15.el6.src.rpm
myo.src.tar.bz2

The MPSS source package is distributed in three different sets:

1. Set one: The full source package with all utilities for build the target (Xeon Phi) BSP and the host side utilities. In order to build this set is neccesary to use the binary SDK distributed with this source package:

package-full_src-k1om.tar.bz2: Host tools and target BSP source code
package-cross-k1om.tar.bz2: Cross-compiler SDK for build the host tools and target BSP.

2. Set two: The source code of SDK and other tools (glibc, gdb, Eclipse CDT, ...)

  • binutils.tar.xz: [Host side]

Cross GNU assembler, linker and binary utilities patched for Xeon Phi.
Probably based on binutils 2.22.52

  • cdt-src.tar.gz: [Host side]

Eclipse CDT plugin for Intel tools.

  • coi.src.tar.bz2: [Host side, Target side]

Intel Coprocessor Offload Infrastructure host side and target side
utilities.

  • gcc.tar.xz: [Host side]

Cross Compiler GCC patched for Xeon Phi support based on GCC 4.7.0

  • gdb-src.tar.gz: [Host side]

GDB with Xeon Phi support probably based on GDB 7.5.

  • glibc.tar.xz: [Target side]

GLIBC for the target BSP (probably based on glibc 2.14.90)

  • myo.src.tar.bz2: [Host side, Target side]

Shared memory programming model library between Xeon processor and
Xeon Phi processors.

  • intel-mic-ofed-card-6720-15.el6.src.tar.gz: [Target side]

OFED card side source code.

3. Set three: A set of SRPMs ready to be rebuilt with some utilities for the host side.

  • intel-mic-ganglia-2.1.6720-15.el6.src.rpm:

intel-mic-ganglia-2.1.6720.tar.gz
intel-mic-ganglia.spec

Ganglia extension for Xeon Phi monitoring

  • intel-mic-kmod-2.1.6720-15.el6.src.rpm:

intel-mic-kmod-2.1.6720.tar.bz2
intel-mic-kmod.spec

mic.ko driver. The source code included in this package is the
same included in mpss-update3-2.1.6720-15/gpl/package-full_src-k1om/card/driver

  • intel-mic-micmgmt-2.1.6720-15.el6.src.rpm:

intel-mic-micmgmt.spec
micmgmtsrc.tar

MIC management binaries tools.

  • intel-mic-ofed-ibpd-6720-15.el6.src.rpm:

ibpd.spec
intel-mic-ofed-ibpd-6720.tgz

Infiniband (OFED) user-space daemon.

  • intel-mic-ofed-kmod-6720-15.el6.src.rpm:

intel-mic-ofed-kmod-6720.tgz
intel-mic-ofed-kmod.spec

Infiniband drivers (OFED) for Xeon Phi.

  • intel-mic-ofed-libibscif-6720-15.el6.src.rpm:

intel-mic-ofed-libibscif-6720.tar.gz
libibscif.spec

Userspace library for Infiniband (OFED) support.

The source code included in this package is the same included in
mpss-update3-2.1.6720-15/src/mic-ofed-card/ofed/src/libibscif

The questions:

1. This explanation about MPSS source code is correct?

2. Is Intel thinking about distribute the MPSS source code in any public SCM in order to track the changes, and to organize the community contributions?

3. The RPM package intel-mic-kmod-2.1.6720-15.el6.src.rpm includes the mic.ko source code driver. This driver is also include in the path:

mpss-update3-2.1.6720-15/gpl/package-full_src-k1om/card/driver

This source is the same in the Driver Revision: 2.1.6720-13 in both locations (the SRPM and the gpl folder) however in the last MPSS source download 2.1.6720-15, this locations have different source code versions of this driver. Is that any kind of error?

4. Is Intel thinking about distribute the core utils (gdb, gcc, binutils, ...) in a different way, for example a URL for donwload the original version of the tool (for example the vanilla GCC 4.7.0 source code) and a set of patches in order to add Xeon Phi support?

This last question is useful for include this MPSS stack in projects like Yocto Project.

Many thanks.

Javi Roman
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Para obtener más información sobre las optimizaciones del compilador, consulte el aviso sobre la optimización.

The MPSS build system will be moving to Yocto in the near future, but individual package/rpm specific information isn't available right now. 

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