Buscar

Buscar resultados para:

Resultados de la búsqueda: 42

  1. cl_khr_fp64 unsupported message on Xeon processor

    https://software.intel.com/es-es/node/632400

    May 16, 2016 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts mmx fxsr sse sse2 ss ht syscall nx rdtscp lm ...

  2. Is it possible to access RAM directly while the memory is cached?

    https://software.intel.com/es-es/forums/software-tuning-performance-optimization-platform-monitoring/topic/419444

    20 Ago 2013 ... Can I achieve by changing the memory type of X into Uncachable (by setting MTRR)? If not, is it possible at all? Thanks! RSS Inicio.

  3. COMPILER MM5 ERROR...HELP!!!

    https://software.intel.com/es-es/forums/intel-fortran-compiler-for-linux-and-mac-os-x/topic/269778

    17 Oct 2009 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx constant_tsc ...

  4. Cluster 2D FFT very Slow, Why?

    https://software.intel.com/es-es/forums/intel-math-kernel-library/topic/295676

    6 Jul 2009 ... wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall lm ...

  5. Compile Pardiso example under linux

    https://software.intel.com/es-es/forums/intel-math-kernel-library/topic/298638

    22 Ene 2009 ... wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall lm ...

  6. Bug in GESDD (but not GESVD)

    https://software.intel.com/es-es/forums/intel-distribution-for-python/topic/628049

    fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm ...

  7. Ambiguity with CR3-store/load exiting settings

    https://software.intel.com/es-es/forums/virtualization-software-development/topic/484882

    22 Oct 2013 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx ...

  8. SGX and SGX1 of CPUID with SKL emulation

    https://software.intel.com/es-es/forums/intel-software-guard-extensions-intel-sgx/topic/609769

    10 Feb 2016 ... ... +AVX +F16C +RDRAND +FPU +VME +DE +PSE +TSC +MSR +PAE +MCE + CX8 +APIC +SEP +MTRR +PGE +MCA +CMOV +PAT +PSE36 ...

  9. PCM V2.6 on Xeon E5 2667 v2, Fedora 20: floating point exception

    https://software.intel.com/es-es/forums/software-tuning-performance-optimization-platform-monitoring/topic/515521

    15 May 2014 ... read(3, " yes\nfpu_exception\t: yes\ncpuid l"..., 1024) = 1024 read(3, "e mce cx8 apic sep mtrr pge mca "..., 1024) = 1024 read(3, "t tm pbe ...

  10. centos6.5 composer_xe_2013_sp1.2.144 libiomp5.so painc

    https://software.intel.com/es-es/forums/intel-open-source-openmp-runtime-library/topic/539027

    21 Ene 2015 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx ...

  11. dgelsd on AMD processor

    https://software.intel.com/es-es/forums/intel-math-kernel-library/topic/288892

    28 Jun 2010 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx mmxext lm 3dnowext ...

  12. "illegal instruction" problem

    https://software.intel.com/es-es/forums/intel-c-compiler/topic/286110?language=ru

    14 Dic 2010 ... ... mce cx8 apic mtrr pge mca cmov pat pse36 mmx fxsr sse syscall mp mmxext 3dnowext 3dnow up nonstop_tsc ts fid vidbogomips : 3333.48.

  13. libmkl_intel_lp64.so incompatible

    https://software.intel.com/es-es/forums/intel-math-kernel-library/topic/288774

    6 Jul 2010 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht s yscall nx mmxext fxsr_opt ...

  14. Configuring RAPL limits in Sandy Bridge Xeon processors

    https://software.intel.com/es-es/forums/software-tuning-performance-optimization-platform-monitoring/topic/389596

    18 Abr 2013 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi .... MTRR Memory Type Range Registers

  15. Regarding gromacs 4.6.5 build failure (mpi compilers)

    https://software.intel.com/es-es/forums/intel-c-compiler/topic/601494

    2 Dic 2015 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx ...

  16. Initialization of VPP Fail (Return error -17)

    https://software.intel.com/es-es/forums/intel-media-sdk/topic/564992

    flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm ...

  17. IPP core dump during execution

    https://software.intel.com/es-es/forums/intel-integrated-performance-primitives/topic/515817

    27 May 2014 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm ...

  18. forrtl: severe (168): Program Exception - illegal instruction

    https://software.intel.com/es-es/forums/intel-fortran-compiler-for-linux-and-mac-os-x/topic/595336

    Oct 11, 2015 ... flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx ...

  19. Is it possible yo use Cache as RAM?

    https://software.intel.com/es-es/forums/intel-c-compiler-and-performance-library-for-qnx-neutrino-rtos/topic/286760

    10 Nov 2010 ... Naresh Solanki. Lun, 11/11/2013 - 09:22. Cache as RAM is possible by controlling MTRR. That is mostly done during BIOS initialization.

  20. Problem with Android application that contain native libraries for ...

    https://software.intel.com/es-es/forums/android-applications-on-intel-architecture/topic/518471

    25 Jul 2014 ... flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx constant_tsc ...

Para obtener información más completa sobre las optimizaciones del compilador, consulte nuestro Aviso de optimización.