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  1. GFLOPS numbers advertised by Intel

    https://software.intel.com/es-es/forums/intel-isa-extensions/topic/291765

    Jan 30, 2010 ... I believe this is true of the Penryn peak performance, as well as Core I7. My Core 2 duo isn't capable of issuing multiply and add on the same ...

  2. SSE 4.2 on which processors?

    https://software.intel.com/es-es/forums/intel-isa-extensions/topic/301229

    31 Jul 2008 ... Thanks Tim. Am I right in assuming that: The code name for the current 45nm processors is Penryn; That of the next generation 45nm ...

  3. Sandybridge processors report incorrect core number?

    https://software.intel.com/es-es/forums/software-tuning-performance-optimization-platform-monitoring/topic/352709

    29 Dic 2012 ... On my primary test platform, an Intel Pentium T4500 (Penryn), it reports the core number correctly, as shown below: However, on a separate ...

  4. Idea for a new SIMD instruction

    https://software.intel.com/es-es/forums/intel-isa-extensions/topic/306026

    Jan 5, 2007 ... I thought it out thoroughly and I was hoping that it could be added to the list of Penryn SSE4 extensions, or at least for Nehalem if Penryn is ...

  5. Reduction on zero-trip loop, error in Intel Fortran/OpenMP ...

    https://software.intel.com/es-es/forums/intel-fortran-compiler-for-linux-and-mac-os-x/topic/271004

    Oct 11, 2011 ... penryn and gfortran, gfortran and pgf95 yield the expected result for sum_b from the second, zero-trip loop. ifort gives some bogus value. I

  6. Getting stuck in ...

    https://software.intel.com/es-es/node/628722

    May 2, 2016 ... Penryn, Nehalem, Westmere see notes below. g9. AVX Sandy Bridge µarchitecture new since IPP v.6.1. h9. AVX2 Haswell µarchitecture.

  7. popcnt latency/throughput in 64bits

    https://software.intel.com/es-es/forums/intel-isa-extensions/topic/289168

    15 Jun 2010 ... http://software.intel.com/en-us/articles/45nm-next-generation-intel-coret-2- processor-family-penryn-and-intel-streaming-simd-extensions-4-intel ...

  8. compiler support for Core i7

    https://software.intel.com/es-es/forums/intel-fortran-compiler-for-linux-and-mac-os-x/topic/269322

    Mar 5, 2009 ... ... point that -xsse4.2 isn't required to gain a performance advantage from Core i7, so all the really useful features work on the Penryn CPUs.

  9. FFT and AVX cpu - different results on 64-bit platform

    https://software.intel.com/es-es/forums/intel-integrated-performance-primitives/topic/507004

    10 Mar 2014 ... When I built this program on 32-bit platform destPenryn and destAVX were exactly the same (ippi versions respectively p8 for Penryn and g9 for ...

  10. andps vs. andpd vs. pand

    https://software.intel.com/es-es/forums/intel-isa-extensions/topic/300557

    Sep 19, 2008 ... Note that a very similar situation applies to super shuffler operation on Penryn. At this point you might be wondering why we have the ...

  11. counting core cycle

    https://software.intel.com/es-es/forums/intel-moderncode-for-parallel-architectures/topic/300007

    Oct 24, 2008 ... Only on Penryn and i7 (and AMD64 CPU) models does the rdtsc give results accurate to within a very few baseline cycles, which translates to ...

  12. SSE vs AVX optimized code generation

    https://software.intel.com/es-es/forums/intel-c-compiler/topic/326004

    Sep 3, 2012 ... Hi all, Have been using templates to write efficient, natural-looking maths that can be compiled against a variety of instruction sets and word ...

  13. Two bad optimization problems with SSE

    https://software.intel.com/es-es/forums/intel-c-compiler/topic/302851

    Mar 26, 2008 ... I've run the test on a Pentium M and on a Core 2 Duo Penryn. My general problem is that I simply cannot have a class like this: struct float4

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