Forum topic


Are AVX instructions available to an enclave?

If so, would SGX protect the entire data path of the SIMD workload?


Autor Arya Pourtabatabaie Última actualización 24/02/2017 - 09:08

在英特尔® 至强融核™ 协处理器上微调矢量化和内存流量:对小型矩阵进行 LU 分解

Common techniques for fine-tuning the performance of automatically vectorized loops in applications for Intel® Xeon Phi™ coprocessors are discussed. These techniques include strength reduction, regularizing the vectorization pattern, data alignment and aligned data hint, and pointer disambiguation.
Autor Vadim K. (Intel) Última actualización 23/02/2017 - 21:28

Intel® C++ Compiler 17.0 Release Notes

This page provides links to the current Release Notes for the Intel® C++ Compiler 17.0 component of Intel® Parallel Studio XE 2017 for Windows*, Linux* and macOS*. 

Autor Kenneth Craft (Intel) Última actualización 22/02/2017 - 04:19

Intel® VTune™ Amplifier XE Release Notes

What's New? describes features and changes since the previous release.

Release Notes include important information, such as

Autor MrAnderson (Intel) Última actualización 21/02/2017 - 09:15
Forum topic

Skylake Xeon and AVX-512VL

Hi all, please excuse my ignorance but I am just wondering if the Skylake Xeon processor is released to the market now?

Autor Martin Z. Última actualización 16/02/2017 - 07:32
Forum topic

why is ‘_mm512d load/store’ intrinsic changed to vmovups not vmovupd?


in my application, speed is very important. so I use intel advisor on my application, then I find that there are some type conversions.

Autor Yeongha L. Última actualización 13/02/2017 - 07:00

Is there an IPP function to detect the processor type?

It describes how to use new Intel IPP function ippGetCpuFeatures() to retrieve processor features.
Autor Ying Song (Intel) Última actualización 08/02/2017 - 23:15

IPP Dispatcher Control Functions - ipp*Init*() functions

Initializing the IPP static and dynamic libraries for optimal performance.
Autor Paul F. (Intel) Última actualización 08/02/2017 - 22:57
Forum topic

Slightly OT, but maybe somebody has an idea.


(My question abot ISA-Extension is near the bottom of post)

today I has found a old piece of code, done time profiling and ....was nearly fallen from the chair.

Autor Alexander L. Última actualización 06/02/2017 - 16:14

Caffe* Optimized for Intel® Architecture: Applying Modern Code Techniques

This paper demonstrates a special version of Caffe* — a deep learning framework originally developed by the Berkeley Vision and Learning Center (BVLC) — that is optimized for Intel® architecture.
Autor Vadim K. (Intel) Última actualización 03/02/2017 - 16:50
Para obtener información más completa sobre las optimizaciones del compilador, consulte nuestro Aviso de optimización.