Mensajes en el blog

Using the Intel Power Gadget API on Mac OS X

Using the Intel® Power Gadget API on Mac OS X*
Autor Patrick Konsor (Intel) Última actualización 10/06/2019 - 15:24
Mensajes en el blog

Go Parallel

This is a first post in a series of posts about parallel programming with

Autor Dmitry Vyukov Última actualización 28/05/2018 - 18:30
Mensajes en el blog

Introduction to OpenMP* on YouTube*

Tim Mattson (Intel) has authored an extensive series of excellent videos as in introduction to OpenMP*.

Autor Mike P. (Intel) Última actualización 04/07/2019 - 19:51
Mensajes en el blog

MICRO48-Tutorial on Intel® Processor Graphics: Architecture and Programming

In this tutorial, we will give an in-depth presentation of the architecture and micro-architecture of the media and graphics accelerator. We will explain the tradeoff between general purpose compute and hardware fixed functions. We will discuss the advantages and disadvantages of on-die integration. We will present the various programming models that are supported. We will present some...
Autor Última actualización 04/07/2019 - 17:22
Mensajes en el blog

opencl_node overview

Introduction
Autor Alex (Intel) Última actualización 30/05/2018 - 07:08
Mensajes en el blog

opencl_node basic interfaces and opencl_buffer

This post continues a series of articles that describes the opencl_node, a new node available in the Intel® Threading Building Blocks (Intel® TBB) library since version 4.4 Update 2.

Autor Alex (Intel) Última actualización 30/05/2018 - 07:08
Mensajes en el blog

Reduce Boilerplate Code in Parallelized Loops with C++11 Lambda Expressions

Parallelize loops with Intel® Threading Building Blocks using Intel® C++ Compiler for lambda expressions.
Autor gaston-hillar (Blackbelt) Última actualización 12/12/2018 - 18:00
Mensajes en el blog

Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Autor Roman Dementiev (Intel) Última actualización 15/10/2019 - 19:10