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Using HLE and RTM with older compilers with tsx-tools

To use HLE/RTM to improve lock scalability the lock library needs to be enabled.

Autor Andreas Kleen (Intel) Última actualización 14/06/2017 - 13:26
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Monitoring Intel® Transactional Synchronization Extensions with Intel® PCM

After applying a new technology (a new processor, a hardware accelerator, a new instruction, etc) besides measuring the immediate performance delta one requires a method to verify that this technol

Autor Roman Dementiev (Intel) Última actualización 04/07/2019 - 17:00
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Fun with Intel® Transactional Synchronization Extensions

By now, many of you have heard of Intel® Transactional Synchronization Extensions (Intel® TSX).

Autor Última actualización 04/07/2019 - 17:00
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Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Autor Roman Dementiev (Intel) Última actualización 15/10/2019 - 19:10