Article

Improve Application Performance on an Intel® Xeon Phi™ Processor

Learn techniques for vectorizing code, adding thread-level parallelism, and enabling memory optimization.
Autor Nguyen, Loc Q (Intel) Última actualización 14/06/2019 - 11:50
Article

Intel® Intelligent Storage Acceleration Library: Cryptographic Hashes for Cloud Storage

Storage efficiency technologies like compression and deduplication with rapid generation of cryptographic hashes are available now via the Intel® Intelligent Storage Acceleration Library (Intel® ISA-L). Code sample illustrates how to use this powerful feature.
Autor Thai Le (Intel) Última actualización 06/07/2019 - 16:40
Article

How to use the MPI-3 Shared Memory in Intel® Xeon Phi™ Processors

Code Sample included: Learn how to use MPI-3 shared memory feature using the corresponding APIs on the Intel® Xeon Phi™ processor.
Autor Nguyen, Loc Q (Intel) Última actualización 06/07/2019 - 16:30
Article

Performance of Classic Matrix Multiplication Algorithm on Intel® Xeon Phi™ Processor System

Matrix multiplication (MM) of two matrices is one of the most fundamental operations in linear algebra. The algorithm for MM is very simple, it could be easily implemented in any programming language. This paper shows that performance significantly improves when different optimization techniques are applied.
Autor Última actualización 14/06/2019 - 11:50
Article

Using Intel® MPI Library on Intel® Xeon Phi™ Product Family

This document is designed to help users get started writing code and running MPI applications using the Intel® MPI Library on a development platform that includes the Intel® Xeon Phi™ processor.
Autor Nguyen, Loc Q (Intel) Última actualización 21/03/2019 - 12:00
Article

Optimizing Computer Applications for Latency: Part 2: Tuning Applications

For applications such as high frequency trading (HFT), search engines and telecommunications, it is essential that latency can be minimized.

Autor Evgueny Khartchenko (Intel) Última actualización 06/07/2019 - 16:55
Article

Code Sample: Optimizing Binarized Neural Networks on Intel® Xeon® Scalable Processors

In the previous article, we discussed the performance and accuracy of Binarized Neural Networks (BNN). We also introduced a BNN coded from scratch in the Wolfram Language. The key component of this neural network is Matrix Multiplication.
Autor Yash Akhauri Última actualización 21/03/2019 - 12:40