Filtros

Article
Mensajes en el blog

Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Autor Roman Dementiev (Intel) Última actualización 06/07/2019 - 17:00
Article

Fortran vs. C Offload Directives and Functions

This is a "cheatsheet" comparing the Fortran and C++ offload directives and functions in the context of programming for the Intel® Xeon Phi™ coprocessor

Autor Belinda Liviero (Intel) Última actualización 08/07/2019 - 15:02
Article

OpenCL™ Platform/Device Capabilities Viewer Sample

Download for Windows*

Autor Última actualización 31/05/2019 - 14:10
Article

General Matrix Multiply Sample

General Matrix Multiply (GEMM) sample demonstrates how to efficiently utilize an OpenCL™ device to perform general matrix multiply operation on two dense square matrices. The primary target devices that are suitable for this sample are the devices with cache memory: Intel® Xeon Phi™ and Intel® Architecture CPU devices.
Autor Última actualización 31/05/2019 - 14:40
Article

Median Filter

The sample demonstrates how to implement efficient median filter with OpenCL™ standard. This implementation relies on auto-vectorization performed by Intel® SDK for OpenCL Applications compiler.
Autor Última actualización 31/05/2019 - 14:40
Article

Bitonic Sorting

Demonstrates how to implement an efficient sorting routine with the OpenCL™ technology that operates on arbitrary input array of integer values. The sample uses properties of bitonic sequence and principles of sorting networks and enables efficient SIMD-style parallelism through OpenCL vector data types. The code is designed to work well on modern CPUs.
Autor Última actualización 31/05/2019 - 14:40
Article

Simple Optimizations of OpenCL™ Code

Simple Optimizations sample demonstrates simple ways of measuring the performance of OpenCL™ kernels in an application. It describes basics of profiling and important caveats like having dedicated “warming” run. It also demonstrates several simple optimizations, some of optimizations are rather CPU-specific (like mapping buffers), while others are more general (like using relaxed-math). The...
Autor Última actualización 31/05/2019 - 14:10
Mensajes en el blog

Applying Intel® Threading Building Blocks Observers for Thread Affinity on Intel® Xeon Phi™ Coprocessors

In spite of the fact that the Intel® Threading Building Blocks (Intel® TBB) library [1] [2] provides high-level task based parallelism intended to hide sof

Autor Alex (Intel) Última actualización 01/08/2019 - 09:30
Article

Using Basic Capabilities of Multi-Device Systems with OpenCL™

Download for Windows*

Autor Última actualización 31/05/2019 - 14:10