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Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Autor Roman Dementiev (Intel) Última actualización 06/07/2019 - 17:00
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Web Resources About Intel® Transactional Synchronization Extensions

A list useful technical resources related to Intel® Transactional Synchronization Extensions (Intel® TSX)
Autor Roman Dementiev (Intel) Última actualización 23/07/2019 - 09:12
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Monitoring Intel® Transactional Synchronization Extensions with Intel® PCM

After applying a new technology (a new processor, a hardware accelerator, a new instruction, etc) besides measuring the immediate performance delta one requires a method to verify that this technol

Autor Roman Dementiev (Intel) Última actualización 04/07/2019 - 17:00
Article

TSX anti patterns in lock elision code

Lock elision is a new way to scale programs. It requires following some rules for correctness and good performance.

Autor Andreas Kleen (Intel) Última actualización 07/06/2017 - 10:53
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Intel® Xeon® E5-2600 v3 Product Family

Autor Nguyen, Khang T (Intel) Última actualización 06/07/2019 - 19:20
Article

Intel® Xeon® Processor E7 v3 Product Family

Autor Nguyen, Khang T (Intel) Última actualización 06/07/2019 - 16:40
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Exposing Processor Features to Dynamic Languages

Intel® for its part invests countless hours and billions of transistors to add features in our silicon products which will speed up people's lives. If only they knew how to take advantage of it! Part of our job in dynamic languages is what I call "putting the cookies on the bottom shelf". Make this advanced technology easily consumable, and show you the value of it so you can be sure to use it.
Autor David S. (Blackbelt) Última actualización 04/07/2019 - 19:43
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Debug Intel® Transactional Synchronization Extensions

If printf or fprintf functions cause transaction aborts, use Intel® Processor Trace as a work-around.
Autor Roman Dementiev (Intel) Última actualización 04/07/2019 - 17:00