Article

DE10-Nano Board Schematic

Figure below shows the block diagram of the DE10-Nano development board. Connections are made through the Cyclone V* SoC FPGA. See attached PDF for full schematic details.

Autor admin Última actualización 02/08/2018 - 22:33
Article

DE10-Nano Board Mechanical Layout

Mechanical layout of the DE10-Nano board.

Autor admin Última actualización 28/04/2017 - 15:23
Article

How to Write an Image to the microSD* Card for the Terasic DE10-Nano

This tutorial explains how to write an image to the microSD* card (removable flash memory) on the Terasic DE10-Nano*. In the steps below, you'll learn where to download the latest image, how to write the image to the microSD card and what to look for (after powering on the board) to ensure you've correctly programmed the card.
Autor admin Última actualización 10/07/2018 - 08:00
Article

Terasic DE 10-Nano Development Board User Manual

DE 10-Nano User Manual.
Autor admin Última actualización 10/07/2018 - 08:00
Article

Compile ‘Hello World’ on the Terasic DE10-Nano Kit

This tutorial explains how to create, compile and run the ‘Hello World’ example application on Linux* for the Terasic DE10-Nano Development Board. You’ll learn how to import and compile a sample application, set up a remote system explorer, and create a debugger configuration to run and debug the application.
Autor admin Última actualización 02/08/2018 - 22:33
Article

How to Program Your First FPGA Device

This tutorial shows you how to create the hardware equivalent of “Hello World”: a blinking LED. This is a simple exercise to get you started using the Intel® Quartus® software for FPGA development. You’ll learn to compile Verilog code, make pin assignments, create timing constraints, and then program the FPGA to blink one of the eight green user LEDs on the board. You'll use a 50 MHz clock input...
Autor Grevelink, Evelyn (Intel) Última actualización 10/07/2018 - 08:00
Article

ADXL345* Accelerometer Tutorial

Data from the built-in 3-axis accelerometer of the Terasic DE10-Nano is measured on ALL 3 axes to show when the board is in motion. The raw output of the accelerometer is converted to g-force values by a sensor library and then sent to graphing software for data visualization and interpretation.
Autor Grevelink, Evelyn (Intel) Última actualización 10/07/2018 - 08:00
Article

Adapting to Security Threats with FPGAs

Intel® Cyclone® V SoC FPGA devices are ideally suited for use in base stations and IoT gateways that must interact with a large network of sensors and actuators in a secure way. Interacting in a secure way means that the two communicating devices trust each other and that commands, messages, and other data passed between the two has not been modified or revealed to an unauthorized party...
Autor admin Última actualización 10/07/2018 - 08:00
Article

Debug FPGA Hardware with System Console

This tutorial shows you how to use the System Console debugging tool to program a compiled FPGA design into an FPGA device, then access the hardware modules (i.e. peripherals) that are instantiated in that FPGA design. This System Console tutorial is based on the FPGA design created in the “Build a Custom Hardware System” tutorial.
Autor admin Última actualización 10/07/2018 - 08:00
Article

Get started – Intel® VTune™ CPU/FPGA Interaction Analysis with Intel® Arria® 10 GX (FPGA)

 

Get started – Intel® VTune™ CPU/FPGA Interaction Analysis with Intel® Arria® 10 GX (FPGA)

Introduction

Autor JONG IL P. (Intel) Última actualización 07/08/2018 - 18:30