This page contains a growing compendium of commonly accessible or downloadable code that can be run on Intel® Xeon Phi™ Coprocessors.
If you have completed an upstream promotion of a community code, please post a thread on the Intel® Many Integrated Core Architecture Forum to let us know, so that we can update this list.
INTRODUCTION AND PURPOSE:
This article endeavors to provide a single point of reference to Power Management blogs, articles and other resources relevant to the Intel® Xeon Phi™ coprocessor.
Unlike a lot of previous recent blogs, this series is about power management in general. At the very end of the series, I’ll write specifically about the Intel® Xeon Phi™ coprocessor.
I have talked incessantly over the years about power states (e.g. P-states and C-states), and how the processor transitions from one state to another. For a list of previous blogs in this series, and well as other related blogs on power and power management, see the article at [List0]. But I have left out an important component of power management, namely the policy.
(For a PDF version of this article, download the attachment.)
At SC13 (Super Computing 2013)*, someone commented that Intel seems to have some super-secret set of tricks in its pocket, allowing us to optimize “far beyond those of mortal man”+. We don’t really have any super-secret tricks. Even if we did, we wouldn’t use them. We want mortal man (you) to be able to reproduce whatever we do. It is also in our business interest to insure that you can optimize on Intel hardware to the fullest extent possible.
I just wanted to let whoever is listening that I just published updates to the Resource Guide for Intel® Xeon Phi™ Coprocessor Developers and Resource Guide for Intel® Xeon Phi™ Coprocessor Administrators documents.
This article identifies resources for anyone investigating the value to their organization of the Intel® Xeon Phi™ coprocessor, which is based on the Intel® Many Integrated Core (Intel® MIC) architecture. It is one of three such guides, each for people in one of the following specific roles:
We had an ask from one of the various “Birds of a Feather” meetings Intel® holds at venues such as at the Super Computing* (SC) and International Super Computing* (ISC) conferences. The customer wanted to know BKMs (Best Known Methods) on the proper usage of the new OpenMP* 4.0 / Intel® Cilk™ Plus SIMD directive. I volunteered to create such a list. Investigating the topic more thoroughly, I discovered that there is already a vast amount of resources on vectorization and the use of the SIMD directive.