Continuing its long tradition of standards-based software products, Intel® has implemented new OpenMP features that enhance the usage of its hardware products. The newly-released OpenMP 4.0 specification (http://www.openmp.org) contains several features that are especially useful with Intel® Xeon Phi™ coprocessors. The accelerator feature is a standardized way to program off-loading computations to such devices. The SIMD feature is a standardized way to engage the 512-bit wide SIMD capability on Intel® Xeon Phi™ coprocessors.
The third session of our High Performance Application Development for Intel® Xeon® and Intel® Xeon Phi™ processors class was held during the last week of September, and generated yet another list of questions. We tried answering all we could, though there were some, due to loss of context ("what was that thing with slide 25?") or other issues that made them difficult to answer. Hopefully the answer your waiting for will be among the list below:
Through this series of labs (intended to be run on the Linux* operating system), we will use a simple implementation of an nbody pairwise computation using the Lennard-Jones Potential from molecular dynamics, as a representative example to get a basic understanding of how to port and optimize applications for the Intel® Xeon Phi™ coprocessor.