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Intel MPI Library Troubleshooting Guide

The latest versions of the Intel MPI Library User's Guides have added an expanded Troubleshooting section.  It provides the following information:

  • General Intel MPI Library troubleshooting practices
  • Typical MPI failures with corresponding output messages and behavior when a failure occurs
  • Recommendations on potential root causes and solutions

Here are direct links to these new sections:

New tool available in beta: Vectorization Advisor

Software must be both threaded and vectorized to get the full performance benefit from today’s and tomorrow’s hardware.  Vectorization Advisor is a vectorization analysis tool that lets you identify loops that will benefit most from vectorization, identify what is blocking effective vectorization, explore the benefit of alternative data reorganizations, and increase the confidence that vectorization is safe.  

Vectorization Advisor is now available for beta test as a part of Intel® Advisor XE 2016. 

The Intel® Parallel Studio XE 2016 Beta program is now available!

Intel Parallel Studio XE 2016 is being made available now as part of a beta test program. In this beta test, you will have early access to Intel® Parallel Studio XE 2016 products and the opportunity to provide feedback to help make our products better. Registration is easy through the pre-Beta survey site

This suite of products brings together exciting new technologies along with improvements to Intel’s existing software development tools:

Troubleshooting HOWTO: Bad hardware? MPSS? Configuration?

Are you having problems with your hardware (Cannot see your Intel(R) Xeon Phi(tm) coprocessor?  Sporadic accessibility?) or with the Intel(R) Manycore Platform Software Stack (Intel(R) MPSS) running reliably?

Attached to this post are PDF "flowcharts" that explain how you can troubleshoot the problem (note:  Both Linux and Windows flowcharts are available), and shows what information you will want to collect if you need to escalate your issue to your OEM provider or Intel.

What collateral/documentation do you want to see?

Do you have questions that you are not finding the answers for in our documentation?  Need more training, source code examples, on what specifically?   Help us understand what's missing so that we can make sure we develop documentation you care about (what is important, and what is nice to have)!   Thank you

FAQS: Compilers, Libraries, Performance, Profiling and Optimization.

In the period prior to the launch of Intel® Xeon Phi™ coprocessor, Intel collected questions from developers who had been involved in pilot testing. This document contains some of the most common questions asked. Additional information and Best-Known-Methods for the Intel Xeon Phi coprocessor can be found here.

The Intel® Compiler reference guides can be found at:

How to kill MPI program programatically

Dear all,

I am having problem destroying Intel MPI program, the original problem is described at this thread.

http://stackoverflow.com/questions/32222878/intel-mpi-mpirun-does-not-te...

I am using impi/5.0.2.044/intel64, and my program is launched with "mpirun -machinefile mymachinefile ./myprogram"

I followed the suggestion to have the runtime executing "kill -<signal> <pid>", but doesn't work for signal 1, 2, 9, 15.

 

Why MIC requires strict data alignment? How about auto vectorize of unaligned data?

MIC requires strict 64Byte data alignment to utilize vpu, but why? I found Sparc also have such an requirement. But other multi-core CPU can handle unaligned data.

As MIC can automatically vectorize a for loop of data(with compiler optimization), what if the data is unaligned in this case? will the auto optimization still work?  if yes, how?

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