Intel® C++ STM Compiler Prototype Edition (Archived)

Compilation error with icc STM C++ compiler 4.0

Hi, I am trying to setup the icc C++ STM compiler and I am running into some problems, does anyone know how to resolve these?

I am using "l_cproc_p_11.0.610_ia32.tgz" downloaded from:

my OS environment is: Debian 4 on ia32 with libstdc++5

Problem with BetaSTMCCompW license

After installing STM compiler with the new trial licence for IntelComposer (Windows), I am getting this error:
Intel C++ STM Compiler Professional for applications running on IA-32, Protot
ype Edition 4.0 Build 20100806 Package ID: w_cstmc_p_11.0.509
Copyright (C) 1985-2010 Intel Corporation. All rights reserved.

Error: A license for BetaSTMCCompW could not be obtained.

How could I provide this BetaSTMCCompW license?

Thanks in advance!

Indirect call not allowed


When trying to compile a code like this:


The compiler says: error: indirect call is not allowed inside routine.

Whereas if a variable is used to hold the results of the first function call:

Class2 class2 = Class1::getInstance()->getClass2();

The compiler will not give any error. Why does the compiler work this way? Is there any way of overriding this behavior?

Thanks a lot, and greetings,


malloc and free in atomic transactions

Hi Everyone,
I am trying to create a simple list benchmark, and running into some issues using malloc and free. I see transactional versions of these functions in libitm.a, which I am assuming are transaction safe. I don't see a header where there are declared, so I create one of my own that uses the annotation to link to the correct symbols.

Using L2 cache as Ram

Hello Friends,
I am Vivek Chand, pursuing my BE in Dr.AIT at Bangalore.
I am designing an OS for MultiCore and ManyCore chips to fully exploit it which wolud be a modification to xv6 and JOS Kernel(MIT's exokernel)
I have the ideas for implementing an deterministic and race-free Operating System.
Now, to make a bit different from the existing OS design, i want to load my microkernel into L2 cache permanently.
i.e, I want my microkernel to be bootloaded into L2 Cache rather than into main memory.

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