Intel® AVX Tutorial at ISPASS 2009


Introduction to the Intel® AVX Instruction Set Extension

April 26, 2009, 2:00PM EDT -- CANCELLED

In conjunction with the ISPASS-2009 conference in Boston, Massachusetts.



Presenters: Mark Charney, Intel Massachusetts
Asaf Hargil, Intel Israel


Intel® AVX (Intel® Advanced Vector Extensions) is a 256 bit instruction set extension to SSE and is designed for applications that are floating point intensive. The enhancement in Intel® AVX allow for improved performance due to wider vectors, new extensible syntax, and rich functionality including the ability to better manage, rearrange and sort data.

Intel announced Intel® AVX in April 2008 to share the plans and start working with global developers prior to release of the microprocessor. Intel® AVX will be a part of the platforms ranging from notebooks to servers.  http://www.intel.com/software/avx

Outline:

Brief overview of Intel® IA32 and Intel64 instruction set. History and
context.

How Intel® AVX extends the architecture state and instruction encodings.

Descriptions of the new instructions including Intel AVX and the fused multiply add.

Programming using intrinsics and assembly language.

Programming guidelines, mixing Intel AVX and SSE, CPUID feature
identification, linkage conventions, alignment considerations.

Overview of using the Intel® Software Development Emulator to
prototype and debug Intel AVX code pre-silicon. Including AVX/SSE
transition checker, Mix histogramming tool. http://www.intel.com/software/sde

Time: 2 hours + 1 hour lab
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