I'm using these counters via RDPMC between two code sites. So, I call RDPMC, store this data, and then call RDPMC again.
It's turning out that on multiple iterations of the code, this (Instructions Retired . ANY)seems to be differing. Is this because of speculation? I thought that retired instructions counterwas not affected by speculation.
But then again I read somewhere (maybe here?) that Branch mispredicts can inflate this number, etc. or some such thing.
Next question is about memory allocations. I'm trying to figure out if I can use BUS_TRANS_MEM to somehow get a feel for it? Would a ratio of INST_RETIRED_LOADS/INST_RETIRED_STORES be helpful as well? L1/L2 cache miss events seem like not too suitable for this.
Just a reminder, this is all between two code sites, I don't use sampling. I'm going to turn on 7 counters (3 fixed, and 4 and always run it on our public facing production service).