multi-core simulators

multi-core simulators

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Has anyone used a (preferably free and open source)multi-core simulator for running programs written with tbb? I came across the m5 simulator which seems pretty good in terms of generating the desired configuration for the target platform, but the most stable ISA supported by m5 in the full system mode is ALPHA. So that would require cross-compiling the code for ALPHA in addition to supporting ALPHA's atomic instructions in TBB and more. Has anyone tried doing that? There is some support for SPARC in m5 as well, and although I haven't tried it yet, since there is a version of tbb for solaris, I am hopeful that that will work. Any help regarding simulators and tbb is appreciated.

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