TSX Exploration Analysis

TSX Exploration analysis type uses event-based sampling collection and is targeted for the Intel® microarchitecture code name Haswell.

This analysis type collects events that help understand Intel Transactional Synchronization Extensions behavior and causes of transactional aborts.

To run the analysis:

  1. Click the New Analysis toolbar button.

    The Analysis Type window opens.

  2. From the left pane, select Microarchitecture Analysis > CPU Specific Analysis > Haswell Analysis > TSX Exploration.

    The TSX Exploration configuration pane opens on the right. The Details section provides a table with the processor events used for this analysis type.

  3. Configure the Analysis step option to specify the event group collected during analysis.

    Typically, you start with measuring transactional success and then, if the aborts rate is high, you run the TSX Exploration to analyze for aborts.

  4. Click Start to launch the analysis.

You can choose to view TSX Exploration analysis results in the TSX Exploration viewpoint that includes the following windows:

  • Summary window displays statistics on the overall application execution.

  • Bottom-up window displays performance data per CPU metrics (event ratio/event count/sample count) for each program unit.

  • Top-down Tree window displays hotspot functions in the call tree, performance metrics for a function only (Self value) and for a function and its children together (Total value).

  • PMU Events window displays count for PMU events selected for the analysis.

  • Uncore Events window displays count for uncore events selected for the analysis. If there are no uncore events, the upper pane of the window is empty.

  • Tasks, Tasks over Time, and Tasks by Threads windows provide details on tasks specified in your code with the Task API.

For the transactional success analysis, the VTune Amplifier provides the following metrics:

  • Clockticks to measure the total number of collected unhalted cycles.

  • Transactional Cycles to measure the number of cycles spent during transactions. If it is near zero then the application is either not using lock-based synchronization or not using a synchronization library enabled for lock elision through the Intel TSX instructions.

  • Abort Cycles to measure the number of cycles spent during transactions which were eventually aborted. If it is small relative to Transactional Cycles, then the transactional success rate is high and additional tuning is not required. If it is almost the same as Transactional Cycles (but not very small), then most transactional regions are aborting and lock elision is not going to be beneficial. To identify the causes for transactional aborts and reduce them, enable the Aborts analysis.

VTune Amplifier classifies aborts by the following reasons:

  • Instruction: Some instructions, such as CPUID and IO instructions, may cause a transactional execution to abort in the implementation.

  • Data Conflict: A conflicting data access occurs if another logical processor either reads a location that is part of the transactional region's write-set or writes a location that is a part of either the read- or write-set of the transactional region. Since Intel TSX detects data conflicts at the granularity of a cache line, unrelated data locations placed in the same cache line will be detected as conflicts.

  • Capacity: Transactional aborts may occur due to limited transactional resources. For example, the amount of data accessed in the region may exceed an implementation-specific capacity.

Reportez-vous à notre Notice d'optimisation pour plus d'informations sur les choix et l'optimisation des performances dans les produits logiciels Intel.