Haswell

RAS Integration and Validation Guide for the Intel® Xeon® Processor E7- v3 Family - Error Reporting Through EMCA2

The document provides Enhanced Machine Check Architecture Gen 2 (EMCA2) RAS feature’s software (BIOS/Firmware, OS) and hardware integration guidance and validation methodologies which are applied in the Intel® Xeon® Processor E7 – v3 based systems (code named Haswell EX). Integration guides in this document contain EMCA2 initialization and runtime procedures including how hardware to log errors and trigger specific SMI to BIOS/SMM handler as firmware first model then how BIOS/firmware reports enhance error logs to system software through Industrial specification ACPI data structure.

  • Développeurs
  • Serveur
  • Intel® Xeon® Processor
  • EMCA
  • Haswell
  • RAS
  • Centre de données
  • Reliability, Availability and Serviceability Integration and Validation Guide for the Intel® Xeon® Processor E7- v3 Family - Memory Address Range Mirroring

    The document provides the Memory Address Range Mirroring RAS feature’s software (BIOS/firmware, OS) and hardware integration and validation methodologies which are applied in the Intel® Xeon® Processor E7 – v3 based systems (code named Haswell EX). Integration guides in this document contain Unified Extensible Firmware (UEFI) BIOS and the OS interface setup flows for reporting and configuring mirror memory region during system boot and runtime.

  • Développeurs
  • Serveur
  • Address Range Mirroring
  • RAS
  • Intel® Xeon® Processor
  • Haswell
  • Informatique en cluster
  • Centre de données
  • AES-GCM Encryption Performance on Intel® Xeon® E5 v3 Processors

    This case study examines the architectural improvements made to the Intel® Xeon® E5 v3 processor family in order to improve the performance of the Galois/Counter Mode of AES block encryption. It looks at the impact of these improvements on the nginx* web server when backed by the OpenSSL* SSL/TLS library. With this new generation of Xeon processors, web servers can obtain significant increases in maximum throughput by switching from AES in CBC mode with HMAC+SHA1 digests to AES-GCM.

  • Développeurs
  • Linux*
  • Serveur
  • Intermédiaire
  • Haswell
  • AES
  • Intel® Xeon® E5 v3 Processors
  • AES-GCM
  • OpenSSL
  • Intel® AES-NI
  • Sécurité
  • 英特尔® 至强™ E5-2600 v3 产品家族

    这些处理器基于英特尔® 酷睿™ 微架构(原代号 Haswell)并在 22 纳米制程技术上生产而成,性能明显高于上一代英特尔® 至强™ 处理器 E5-2600 v2 产品家族。 它是首款支持高级矢量扩展指令集 2.0 (AVX2) 的英特尔® 至强™ 协处理器产品家族。

     

  • Intel® Xeon® Processor
  • Haswell
  • Intel® Xeon® E5-2600 v3
  • Informatique cloud
  • Informatique en cluster
  • Processeurs Intel® Core™
  • Informatique parallèle
  • Efficacité de l’alimentation
  • Sécurité
  • S’abonner à Haswell