There's a lot of IoT news and articles being published lately and this is just a sample of articles that I saw in the past week.
I'm using the current stable Intel OpenCL SDK, which is 1.2 compliant, but I ran into a problem compiling my code because Intel's cl_ext.h header file is not identical to the Khronos' cl_ext.h header file (https://www.khronos.org/registry/cl/api/1.2/cl_ext.h). Specifically, the macro definitions under cl_khr_spir are missing. Please do not ship headers for a version of OpenCL that remove something from the Khronos' corresponding header (adding more is fine as long as there are no conflicts). Thanks!
I am trying to install the new Intel SDK for Open CL Applications 2014 Beta on my machine, but I do not manage.
My machine is running windows 7 (32-bit), and has Intel Core i5-3320M CPU and Intel HD Graphics 4000 processors.
The Intel Graphics Driver currently installed on my machine has version 184.108.40.20639, but I find in the documentation
that the new SDK requires version 15.33.8 and higher.
I would like to know if we will see support for the newly announced SYCL Khronos standard in the Intel OpenCL SDK anytime soon?
For me using the C++ syntax described by SYCL will certainly be a big step forward closing the gap with CUDA.
I'm benchmarking accelerated libraries for key-value sorting. Intel mentions parallel_sort in hundreds of tutorials, but they never go further than just mentioning - almost no compilable code examples for MIC, and no perf numbers, except 1 slide here. As result, I had to write my own sample (attached). Surprisingly, for me Xeon Phi 5110P processes 256M elements 5 times slower than Xeon CPU. I doubt it's normal.
How to I know if a node has a coprocessor while on runtime?
I am currently working on a book about parallel programming using the intel compilers and libraries. A chapter will be dedicated to the Xeon Phi and I would therefore need an Intel tech reviewer for the chapter. I would preferably wish an Intel employee with hands on experience on the Xeon Phi. As a tech reviewer you will appear in the book's front matter including a short bio. The book is part of the ApressOpen platform.
If you are interested in reviewing the book, please contact John Aiken at Intel Industry Education (formerly Intel Press).
Is RAPL event PACKAGE_ENERGY:PACKAGE0 including DRAM_ENERGY:PACKAGE0 and PP0_ENERGY:PACKAGE0? Or the total system energy should add the three events joules together?
PACKAGE_ENERGY:PACKAGE0 176.450363J (Average Power 42.9W) PACKAGE_ENERGY:PACKAGE1 75.812454J (Average Power 18.4W) DRAM_ENERGY:PACKAGE0 11.899246J (Average Power 2.9W) DRAM_ENERGY:PACKAGE1 8.341141J (Average Power 2.0W) PP0_ENERGY:PACKAGE0 118.029236J (Average Power 28.7W) PP0_ENERGY:PACKAGE1 16.759064J (Average Power 4.1W)