Extensions Intel® Streaming SIMD

There are something wrong with using svml in inline ASM

     I try using __svml_sin2 in inline ASM like the way compiler does.  A code snippet as following,

     "vmovupd (%1), %%ymm0\n\t"
     "call __svml_sin4\n\t"
     "vmovupd %%ymm0, (%0)\n\t"
     "sub $1, %%rax\n\t"
     "jnz 3b\n\t"

    The program can build. But, the running output values are wrong.

AVX Power consumption (on i5)

Dear all,

Is there any data on how much more power is consumed when using the AVX, specifically on an i5 ? Where can I get some data on the i5 power consumption of power at peak floating point processing without the use of AVX, and the use of AVX.


I would expect it to look like something in the order of 55w without AVX, 60w with AVX. This is a total assumption only and I would appreciate anyone with some quantitative opinions to list here.


How Intel® AVX Improves Performance on Server Application

The latest Intel® Xeon® processor E7 v2 family includes a feature called  Intel® Advanced Vector Extensions (Intel® AVX), which can potentially improve application performance.   Here we will explain the context, and provide an example of how using Intel® AVX improved performance for a commonly known benchmark.

For existing vectorized code that uses floating point operations, you can gain a potential performance boost when running on newer platforms such as the Intel® Xeon® processor E7 v2 family, by doing one of the following:

Using the Intel® IPP Library in an Embedded System – Linkage Model Size Differences

If you are familiar with the Intel® Integrated Performance Primitives (Intel® IPP) library you know that it is widely used to build applications built for the Microsoft* Windows* and Linux* operating systems – today's most prevalent "standard" desktop and server operating system (OS) platforms. What you may not know is that the Intel IPP library can also be used with applications built for some embedded and real-time operating systems (RTOS).

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  • Different ways to turn an AoS into an SoA


    I'm trying to implement a permutation that turns an AoS (where the structure has 4 float) into a SoA, using SSE, AVX, AVX2 and KNC, and without using gather operations, to find out if it worth it.

    For example, using KNC, I would like to use 4 zmm registers:

    {A0, A1, ... A15}

    {B0, B1, ... B15}

    {C0, C1, ... C15}

    {D0, D1, ... D15}

    to end up having something like:

    {A0, A4, A8, A12, B0, B4, B8, B12, C0, C4, C8, C12, D0, D4, D8, D12}

    {A1, A5, A9, ...}

    {A2, A6, A10, ...}

    {A3, A7, A11, ...}

    Digital Security and Surveillance on 4th generation Intel® Core™ processors Using Intel® System Studio

    This article presents the advantages of developing embedded digital video surveillance systems to run on 4th generation Intel® Core™ processor with Intel® HD Graphics, in combination with the Intel® System Studio software development suite. While Intel® HD Graphics is useful for developing many types of computer vision functionalities in video management software; Intel® System Studio is an embedded application development suite that is useful in developing robust digital video surveillance applications.

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  • Parallel Computation of Sparse Rulers

    This article explains the sparse ruler problem, two parallel codes for computing sparse rulers, and some new results that reveal a surprising "gap" behavior for solutions to the sparse ruler problem. The code and results are included in the attached zip file.


    A complete sparse ruler is a ruler with M marks than can measure any integer distance between 0 and L units. For example, the following ruler has 6 marks (including the ends) and can measure integer distance from 0 to 13:

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