Processeurs Intel® Core™

ADVANCED COMPUTER CONCEPTS FOR THE (NOT SO) COMMON CHEF: INTRODUCTION

 

TITLE:
INTRODUCTION
ADVANCED COMPUTER CONCEPTS FOR THE (NOT SO) COMMON CHEF

While talking to a very intelligent but non-engineer colleague, I found myself needing to explain the threading and other components of the Intel® Xeon Phi™ ⅹ100 and ⅹ200 architectures. The first topic that came up was hyper-threading, and more specifically, the coprocessor’s version of hyper-threading. Wracking my brain, I finally hit upon an analogy that seemed to suit: the common kitchen.

Analyzing Intel® SDE's TSX-related log data for capacity aborts

Starting with version 7.12.0, Intel® SDE has Intel® TSX-related instruction and memory access logging features which can be useful for debugging Intel® TSX's capacity aborts. With the log data from the Intel SDE you can diagnose cache set population to determine if there is non-uniform cache set usage causing capacity overflows. A refined log data may be used to further diagnose the source of the aborts.

  • Développeurs
  • Partenaires
  • Étudiants
  • Apple OS X*
  • Linux*
  • Microsoft Windows* (XP, Vista, 7)
  • Microsoft Windows* 8
  • Unix*
  • Serveur
  • Python*
  • Avancé
  • Intel® Software Development Emulator
  • Intel® Transactional Synchronization Extensions
  • Intel Transactional Synchronization Extensions (Intel TSX)
  • Intel SDE
  • Restricted Transactional Memory (RTM)
  • Débogage
  • Outils de développement
  • Processeurs Intel® Core™
  • Code source libre
  • Optimisation
  • Informatique parallèle
  • Parallélisation
  • Contrat de licence: 

    S’abonner à Processeurs Intel® Core™