Diagnostic 15033: loop was not vectorized: modifying order of operation not allowed under given switches (Fortran)

Cause:

A summation operation or reduction can be vectorized by breaking it up into a separate partial sum for each vector lane, and then adding together the partial sums at the end. Because this changes the order in which the individual contributions to the sum are added together, and hence the effects of rounding to floating-point precision, the final result may differ slightly compared to a scalar floating-point reduction, though it is not necessarily any less accurate. For some purposes, there may be a need to obtain identical floating-point results, independent of optimization level. The switches -fp-model precise or -fp-model source, (equivalent for Fortran), achieve this by disabling those optimizations which might lead to slight variations in floating-point rounding effects. (See http://software.intel.com/en-us/articles/consistency-of-floating-point-results-using-the-intel-compiler/ for more detail). Vectorization of floating-point reductions is one such optimization that is disabled under switches such as -fp-model precise, -fp-model source or -fp-model restrict, with the message "modifying order of operation not allowed under given switches".

Example:

real function sum(x,n)
   implicit none
   real,    intent(in), dimension(n) :: x
   integer, intent(in )              :: n
   integer                           :: i

   sum=0.
   do i=1,n
      sum = sum + x(i)
   enddo
   
end function sum
> ifort -c -vec-report2 -fp-model source d_15033_1.f90
d_15033_1.f90(9): (col. 7) remark: loop was not vectorized: modifying order of operation not allowed under given switches
 

Resolution:

It is possible to enable some of the features of -fp-model precise while still allowing changes in the order of floating-point operations including vectorization of reductions, for example, by compiling with  ifort -c -mp1 -no-ftz -no-fast-transcendentals -prec-div -prec-sqrt  .
 
It is also possible to force the vectorization of a reduction loop by using a !DIR$ SIMD (or !$OMP SIMD) directive to override a switch such as -fp-model precise. The switch will continue to apply to other optimizations and to the remainder of the compilation unit. For a reduction loop, the SIMD directive requires a REDUCTION clause for correct behavior. An example:
real function sum(x,n)
   implicit none
   real,    intent(in), dimension(n) :: x
   integer, intent(in )              :: n
   integer                           :: i

   sum=0.
!dir$ simd reduction(+:sum)     !  or !$omp simd reduction(+:sum)
   do i=1,n
      sum = sum + x(i)
   enddo
   
end function sum

> ifort -c -vec-report2 -fp-model source d_15033_2.f90
d_15033_2.f90(9): (col. 4) remark: SIMD LOOP WAS VECTORIZED

 

Back to the list of vectorization diagnostics for Intel Fortran

Per informazioni più dettagliate sulle ottimizzazioni basate su compilatore, vedere il nostro Avviso sull'ottimizzazione.
Contrassegni: