Using the GPIO in the FPGA to control actuators

Using the GPIO in the FPGA to control actuators

Ritratto di jaquense

Hi, I was wonderning if there are pins on the board which we can use as a GPIO? (General Purpose Input/Output) in order to control some actuators. Because as far as we know it is not possible on the board because there are no pins mapped for that purpose and the only GPIO pins are mapped to leds and switches.
If not, what do you suggest we can do? serial communication with another microcontroller to control the actuators? Best Regards,

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Ritratto di Dexuan Cui (Intel)

Could ZLG please answer the question?

Ritratto di zlg-dushaoping

hi ,The ESDC Platform have a Camera Inteface.it is untapped,you can use it as GPIO intefaceIt is JP4,there is a CAMERAsilk-screen below the Camera Inteface. Detailed pinout and address map please read Platform Schematic and FPGA system address allocation.
Download link:
http://software.intel.com/zh-cn/articles/2012_ESDC_Platform_Resources/

Ritratto di oscarodea

Hi, I have some doubts.

I checked the schematic and I found the JP4 connector, their terminals have a name but it doesn't correspond exactly at the document "Mapping Altera* FPGA Pins to Intel AtomTM Processor E6x5C Series Pins"

Let me explain with an example:

In the schematic the terminal 9 of JP4 has a name "7A_TIO6_LVDS_TX_T8_DP_M", and in the document "Mapping Altera* FPGA Pins to Intel AtomTM Processor E6x5C Series Pins" I couldn't find this exact name, althought I found some similar names "7A_TIO6_LVDS_TX_T8N" and "7A_TIO6_LVDS_TX_T8P"

Which of these pins correspond to the terminal 9 of JP4 connector?

Thanks

Ritratto di zlg-dushaoping

hi
Sorry! That is a trouble of naming rule. 7A_TIO6_LVDS_TX_T8_DP_M means 7A_TIO6_LVDS_TX_T8N,7A_TIO6_LVDS_TX_T8_DP_P means 7A_TIO6_LVDS_TX_T8P, and so on.

Ritratto di josempb9

Hello everyone,
I was wondering if there is a similar example of Usage Notes (FPGA+Peripharal+Linux+Driver+Usage+Notes.pdf) for GPIO pins.

We are trying to modify the address of the pins without success and we don't know how to configure the desired pin as input or output. Is there any register that controls that ?

By the way, if anyone has examples to share, it will be appreciated.

Thanks in advanced.

Ritratto di zlg_tiancheng

ESDC platform above the LED light control is the most simple GPIO control module can control the LED lights, all the GPIO usage.A development platform to use, carefully read the examples, and related documentation, to achieve all the simple things gave an instance is unrealistic.LED is a simple GPIO control output, there is no complex control algorithm, see how to take advantage of this platform.

Ritratto di josempb9

We already did the simple GPIO control module but according to previous posts, they suggested to use the Camera Pins as GPIO pins.
That's where we are trying modify the address with no success (reference:FPGA system address allocation). How do you enable or configure camera pins as gpio ?
We thought of modifying the address inside the linux drivers files but the only driver that includes related info is zlge6x5c-mfd.

GPIO_OFFSET 0x02211000 change to -> 0x02212000 (Camera offset)
GPIO_END 0x0221103f change to -> 0x02212007 (Camera_end)

We need to modify this file or add anything else to make them work as GPIO?

Again, thanks for your attention and time.

Ritratto di jaquense

No answers..... Need help! Cheers,

Ritratto di zlg_tiancheng

CAMERA's GPIO pins, FPGA firmware you want to modify the PC software control to be modified.The LED light is the most simple GPIO control, pin assignments you want to find to achieve the look-up table method training PPT above, address the allocation of 64M address range can be controlled.The most simple to use GPIO module, the LED pin assignments to the CAMERA GPIO above.

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