Unable to ative the SSE nstruction set byadding compile flag “march=native” in gcc

Unable to ative the SSE nstruction set byadding compile flag “march=native” in gcc

My machine is Core2 microarchitecture and I try to compile some arithmetic codes by using the SSE instruction set. I search on the web and official manual, the answer is everything I need to do (in simplest way)  to add the flag: march=native, because my chip support SSE. But when I use "gcc -march=native -Q --help=target -v" to check if the flag really works, the results display on the screen is a little bit beyond expectation, like:

-msse [disabled]

-msse2 [disabled]

-msse2avx [disabled]

-msse3 [disabled]

-msse4 [disabled]

-msse4.1 [disabled]

-msse4.2 [disabled]

-msse4a [disabled]

-msse5

-msseregparm [disabled]

-mssse3 [disabled]

I find all the SSE (even MMX) is disabled. Can any body tell me why and how to solve it? Many thanks!

PS: I know,an alternative way to active the option is to add the flags like -mmsse ...manually. But, I am just curiosity, why march=native doesn't works in my system:core2,Ubuntu 12.04(64bit system), gcc 4.6.3

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I didn't try to use -march=native option but I know that the switch -m[ instruction set code ] ( like, -msse ) should work. If it doesn't work when using gcc 4.6.3 than this is a possible bug in the compiler.

Could you find a more up to date build of gcc for your OS?  The response posted looks like your CPU has been taken for an AMD.

core2, unfortunately, is ambiguous, as early core2 (including my last one) didn't support SSE4.1, while recent versions do, so it won't be surprising if gcc doesn't do a lot for you with that option.

On the old core2, with the gcc versions available back then, I used stuff like -march=pentium4 (if 32-bit).  -mssse3 wasn't as important for gcc as for icc (of course you want that or -msse3 to support complex arithmetic).  For the older gcc on the newer core2 with sse4.1, you may want

-mtune=barcelona to encourage the compiler to use some 128-bit moves.  gcc was correct in preferring to split many 128-bit moves on the older core2.

I'm on Ubuntu 12.04, x86-64, gcc 4.6.3, Sandy Bridge CPU. Your command works as expected on my setup, all -msse* and -mavx are enabled. Could you also try the following command:

gcc -march=native -dM -E - <<<'' | grep SSE

This will display the predefined macros that indicate the support for various SSE versions. If that doesn't show anything, take a look at /proc/cpuinfo - are the extensions you're looking for there?

Also, are you by any chance running on a virtual machine? Hypervisors often disable CPU extensions for guest systems.

Please verify if ???intrin.h header files exist in ../4.6.3/include folder.

Thank you all above:

I think it's a “information prompting” bug of gcc on my environment, meaning the information retunred by the command "gcc -march=native -Q--help=target -v" is not correct with reality, because in fact I can use sse ISA without any flags with gcc.

Citazione:

Chenjie Y. ha scritto:

Thank you all above:

I think it's a “information prompting” bug of gcc on my environment, meaning the information retunred by the command "gcc -march=native -Q--help=target -v" is not correct with reality, because in fact I can use sse ISA without any flags with gcc.

All 64-bit versions of gcc for core2 will use sse and sse2 by default.

Last week I integrated GCC version 4.8.1 ( MinGW for Windows ). After my initial verifications I did not see any issues with SSE, SSE2, SSE4.x and AVX Intel instruction sets.

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