Intel® Developer Zone:

Attività di rilievo

Appena pubblicato! Intel® Xeon Phi™ Coprocessor High Performance Programming 
Nozioni di base sulla programmazione per questa nuova architettura e nuovi prodotti. Novità!
Intel® System Studio
Intel® System Studio è una soluzione completa di suite integrate di strumenti per lo sviluppo del software che può accelerare i tempi di commercializzazione, rafforzare l'affidabilità del sistema e migliorare l'efficienza energetica e le prestazioni. Novità!
Nel caso vi sia sfuggito: 2 giorni di riproduzione del webinar dal vivo
Introduzione allo sviluppo di applicazioni a prestazioni elevate per i coprocessori Intel® Xeon® e Xeon Phi™
Structured Parallel Programming
Gli autori Michael McCool, Arch D. Robison e James Reinders usano un approccio basato su modelli strutturati che dovrebbero rendere l'argomento accessibile a ogni sviluppatore di software.

Offrite ai clienti applicazioni dalle prestazioni massime grazie all'uso della programmazione parallela con le risorse innovative di Intel.

Risorse di sviluppo

Tool per lo sviluppo


Intel® Parallel Studio

Intel® Parallel Studio offre agli sviluppatori Microsoft Visual Studio* C/C++ dei tool avanzati per ottimizzare le applicazioni client per i sistemi multi-core e many-core.

Prodotti Intel® per lo sviluppo di software ›

Esplorate tutti i tool che vi aiutano a ottimizzare per l'architettura Intel. Alcuni tool sono disponibili per un periodo di valutazione gratuita di 45 giorni.

Knowledge base dei tool

Vi si trovano guide e informazioni di supporto sui tool Intel.

The Generic Address Space in OpenCL™ 2.0
Di Adam Lake (Intel)Pubblicato il 02/06/20150
Introduction What is the Generic Address Space? Enabling the Generic Address Space Why Would I Want to Use the Generic Address Space? Performing Some Operations in a Specific Address Space Address Space Casting Performance Implications and How to Address Them A Working Example Future Work...
Di Harish Patil (Intel)Pubblicato il 02/05/20150
I. From Rice University Prof. John Mellor-Crummey's talk at Supercomputing 2014 (see PinPlay description on slides 6-8):Introduction to Correctness and Performance Tools for Parallel Programming. The International Conference for High Performance Computing, Networking, Storage and Analysis (SC14)...
DrDebug : Linux Command Line Usage
Di Harish Patil (Intel)Pubblicato il 02/05/20150
Using DrDebug requires following two phases1. recording and 2. replaying. Pre-requisites Setup  Recording With GDB From command line (without GDB)  Replaying With GDB From command line (without GDB)  Pre-requisites GDB version 7.4 or higher with Python support PinPlay/DrDebu...
Quick Installation Guide for OpenCL™ Development on Windows* with Intel® INDE
Di Robert Ioffe (Intel)Pubblicato il 02/04/20150
Intel® INDE provides a comprehensive tool set for developing applications targeting both CPU and GPUs, enriching the development experience of an OpenCL developer. Yet, if you got used to work with the legacy Intel® SDK for OpenCL™ Applications or if you just want to get started and build your fi...
Iscriversi a Articoli Intel Developer Zone
Nessun contenuto trovato
Iscriversi a Blog Intel® Developer Zone
The list of out-of-order CPUs
Di bp1
Hi, I would like to know the list of commercial products ( CPUs / SoCs ) made by Intel that support an out-of-order execution . I noticed that the new Baytrail architecture apparently should support this kind of execution, but I have no information about other architectures, about Xeon, iCore, previous Atoms, Celerons and Pentiums; at this point I also have no specific information about the subsets of a given family, for example Baytrail is usually shifted into Baytrail-M and Baytrail-T and I can only speculate that this new out-of-order applies to both . It would also be really nice if you can spend some time describing the support to this kind of memory models given by open source compilers such as gcc and clang . Thanks .
Linking against both the sequential and threaded mkl
Di Mark Thomas5
I have two dlls that link against the static mkl libraries.  One of the dlls links against the sequential version and the other against the multi-threaded version.  Those two dlls are then loaded in to the same process.  Does anybody know whether this is safe to do please? Kind regards Mark
How to track down OpenMP segfault caused by the addition of ORDERED?
Di Alastair M.4
Dear all, I hope this is the right place to ask this question. I am working on adding OpenMP support to some existing Fortran code, using ifort version 15. I noticed that the addition of the c$OMP ORDERED clause to my outer parallel do loop causes the program to segfault in the second loop iteration, when attempting to access a FIRSTPRIVATE variable.  This occurs with OMP_NUM_THREADS=1.  The same error also occurs with ifort 14.0.2. On further inspection I realised that at some point during the 2nd loop iteration the stack becomes corrupted.  That is, "info locals" in gdb complains about not being able to read certain variables, when it previously could, and then the segfault follows shortly afterwards.  I also noticed that the location of the segfault is repeatable but changes when the list of FIRSTPRIVATE variables is changed. With the ORDERED construct removed from the loop, the program executes correctly and tests with valgrind and inspxe indicate zero problems.  I have ulimit -...
Where can i download Intel MPI Benchmarks?
Di Bo W.1
Hello everyone, where can i  download the intel mpi benchmarks? Cheers, Bo
'Wildhoney' - the 512bit superfast textual decompressor - some thoughts
Di Georgi M.19
Hi to all. Glad I am that finally joined the Intel forum, long overdue. Here I want to share my amateurish vision on superfast textual decompression topic. For 4 months now I have been playing with my file-to-file decompressor named Nakamichi. I am on quest for writing the fastest possible variant of my approach, branchlessness combined with one only native (hifhest order) register on latest machines. This translates to 64bit/512bit mixed code. Few hours ago I wrote 'Wildhoney' variant using just that configuration. And two important things: - Nakamichi is 100% FREE - no restictions at all for modifying as the original Lempel-Ziv was; - Speed is religion, the fastestness is the ultimate goal. So far, I have written two OpenMP console tools, each enforcing 16 threads - MokujIN and Kazahana, I hope Nakamichi 'Wildhoney' to be the third. Any help in developing it I would appreciate, many basic still things I don't know. The ZMM executable with the C source is here:http://www.san...
need something like a sorted tbb::parallel_do
Di foelsche@sbcglobal.net1
    from what I see there is tbb::concurrent_priority_queue.         but with this I would have to deal with thread pools myself.       is this really true?
TBB: Using task_scheduler_observer to set worker thread's OS scheduling priority
Di Tim Day5
I'm looking at TBB's task_arena and task_scheduler_observer. The documentation for task_scheduler_observer sketches out a nice example of it being used to set thread affinity on worker threads to lock an arena's threads onto a subset of cores. I'm curious to know whether this class and a similar pattern could practically be used to set OS scheduling priority for an arena.  What I'm interested in doing is, on my N core HW, creating an arena with N normal worker threads, and another arena with N threads on a lower OS scheduling priority.  However, the issue with scheduler priority is that generally you only get to lower it (unless running as root, but assume not), and it's not clear to me to what extent TBB worker threads move around between arenas (which would defeat the object of keeping all the low priority threads in one arena); the task_scheduler_observer docs mention returning false from on_scheduler_leaving() to keep a thread in an arena... but also mentions the possibility of ...
API for Haswells TSX
Di roberto c.2
hello, i have just begun my research focus with HTM, primarily focusing on RTM(restricted transaction memory). is there any APIs for RTM? I have looked on the internet but only the basic operands exist for RTM, such as xbegin, xend, xabort, xtest. I want to be able to access the shared memories with HTM but i can not find any library files for it.  Can you please point me in the right direction, thanks for your support.
Iscriversi a Forum

Attività di rilievo