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Monitoraggio delle piattaforme

Benvenuti nella comunità sul monitoraggio della piattaforma Intel.

In questa comunità si troveranno informazioni su argomenti quali il monitoraggio delle prestazioni, l'ottimizzazione del software e il monitoraggio delle piattaforme. Il monitoraggio delle prestazioni copre svariati argomenti, che vanno da un'introduzione alle metodologie di monitoraggio e di regolazione del software, a tecniche di ottimizzazione e metodologie ottimali per principianti e per utenti più esperti.

Per gli sviluppatori sono messi a disposizione manuali di riferimento per la programmazione contenenti le ultime informazioni che descrivono l'interfaccia hardware della PMU (Performance Monitoring Unit) dei microprocessori Intel, incluse le risorse per il monitoraggio del core e dell'uncore, e che servono da fonte di informazione completa sugli eventi delle prestazioni che potrebbero essere monitorati.

Il monitoraggio della piattaforma include argomenti relativi al monitoraggio del computer quali il monitoraggio del core e dei processori grafici della CPU e di altri coprocessori di sistema, nonché la misurazione e la qualità del servizio.

Platform Monitoring Frequently Asked Questions
Di Pubblicato il 09/15/20100
Introduction This is an organic document, meaning, that it will expand as need and request dictate. The purpose is to help establish a repository of common and perhaps not-so-common questions that arise while optimizing systems using Platform Monitoring processes. Platform Monitoring Overview 1....
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Run to Run variability on an Intel(R) Xeon(R) CPU E3-1240 v3
Di Animesh J.0
Hi, I have been struggling to get reproducible results in a very simple Matrix multiplication code. I see variability of even more than 10% from run to run. I have run the perf stat command to monitor the runs.   1024x1024  Performance counter stats for 'taskset 0x1 MM_binaries/MM_tiled_1024':    198,505,412,302 cycles                    #    0.000 GHz                     [57.14%]    283,932,630,578 instructions              #    1.43  insns per cycle         [71.42%]    111,811,914,939 L1-dcache-loads                                              [71.43%]      1,091,387,355 L1-dcache-load-misses     #    0.98% of all L1-dcache hits   [71.43%]      1,088,112,128 r504f2e                                                      [71.44%]        543,287,591 r50412e                                                      [71.43%]                  0 LLC-prefetches                                               [57.14%]       71.139608212 seconds time elapsed  Performance counter stats for ...
Xeon E5 26xx v3 energy monitor error
Di Roberto R.7
I am developing an app for a Intel(R) Xeon(R) CPU E5-2695 v3 @ 2.30GHz. I need to access the cores energy consumption. I am doing it using the RAPL feature. I have access to the dram and package energy consumption but when I tried to access the core consumption (PP0) I always read zero from the MSR_PP0_ENERGY_STATUS. I am using the MSR specification from the Software Developer Manual table 35.25.  As I said the I can read the package and dram energy consumption but the PP0 always return 0. From the manual I understood this feature is present in my processor. What could be wrong? I tried my program in an Intel(R) Core(TM) i7-4702MQ CPU @ 2.20GHz and works perfect but in the server is not working. Thanks in advance.    
Instrument all LD/ST instructions for a given snippet of code
Di Jithin Parayil T.3
Hi, Currently, I measure the L2 and L3 cache hit ratio and misses for a C++ code snippet using the Intel PCM library. Can the PCM library be used to collect  additional information as described below: I would like to instrument all load and store instructions executed by a snippet of C++ code. Following is the information I would like to collect for each such instruction: * Virtual memory address being accessed for the data * Was the access a cache hit or not? If it was a hit, which level of cache did it hit in? If the PCM library does not support this, is there an alternative option to collect this info? I'm working on an IvyBridge machine - Intel(R) Xeon(R) CPU E5-2697 v2 machine - 2 sockets with 12 cores per socket (Hyperthreading is enabled - hence 24 cores/socket) Thanks, Jithin
Do intel cpus have options to speed up ipc ?
Di Jog L.2
Hello, Maybe something silly I ask, but still : Do intel cpus have some options to make interprocess communication faster. I currently use mmaped regions buts maybe something even better could be done at the cpu level. My feeling is that it cannot be used in any way because the kernel organizes things. But it would be amazing still. I am on Linux, with kernel 3.19. Any pointer how to make things go faster is of my interest.
Inline assembly to generate most heat on SB-E
Di CommanderLake14
I'm curious as to what __asm instructions would generate the most heat on a SB-E for stability testing, with prime95 I can get the CPU package power to just over 130w but experimenting with my own AVX assembly I cant get more than 100w out of it?
Intel PCM, measuring RAM activity ? (data not energy)
Di Jeremie Lagraviere2
Hi everyone, I have a simple question about Intel PCM: Is it possible to measure RAM data activity in the code ? Same question with any of the ready-made tools provided in Intel PCM package ? All I have seen so far, is RAM energy measurement. Thanks in advance for your help :) --Jeremie.
Error building IntelPerformanceCounterMonitorV2.8 in Visual Studio 2013
Di kmathew8
Hello, I encounter the following error when I compile IntelPerformanceCounterMonitorV2.8 using Visual Studio 2013. 1>------ Build started: Project: PCM-Service, Configuration: Release Win32 ------ 1>  utils.cpp 1>c:\intelperformancecountermonitorv2.8\utils.h(60): error C3861: 'YieldProcessor': identifier not found ========== Build: 0 succeeded, 1 failed, 0 up-to-date, 0 skipped ========== Has anyone encountered this issue?  Thanks  
CPU/GPU ring programming
Di Samy C.1
Hello, I am new on this forum. I start to design a C langage software based on CPU+GPU programming. The idea is to offload the processing on GPU when the tasks become heavy for some part of the software. I read the Gen8 paper talking about CPU+GPU shared ring memory. I look for information on how to program an application to use theses features. Could you recommend me some API, debugging tools, cache layers (L1, L2, L3) tools to visualize, investigate how the software behave on theses layers. I currently use a MacBook Air ( Device Intel(R) Core(TM) i5-4260U CPU @ 1.40GHz supports OpenCL 1.2  Device HD Graphics 5000 supports OpenCL 1.2 ) Sorry for such a beginner question
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Monitoraggio delle prestazioni del software

Notizie importanti dal responsabile della comunità

Il 5 gennaio 2011, Intel ha lanciato la famiglia di processori Intel® Core™ di seconda generazione (chiamata in precedenza con nome in codice Sandy Bridge) per laptop e PC. I nuovi processori hanno una nuova architettura rivoluzionaria che per la prima volta combina sullo stesso die il “cervello” di elaborazione o microprocessore con un motore di grafica. Le nuove funzioni includono Intel® Insider™, Intel® Quick Sync Video e una nuova versione del famoso Intel® Wireless Display (WiDi) che ora offre capacità 1080p HD e protezione dei contenuti per coloro che desiderano visualizzare il contenuto HD dello schermo del laptop su una TV.

Rimanete connessi. Visitate spesso. Pubblicheremo online le guide alla programmazione PMU e tool aggiornati per offrirvi le ultime informazioni sulle innovazioni della nuova microarchitettura Intel