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AES New Instructions

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AES-GCM Encryption Performance on Intel® Xeon® E5 v3 Processors
Di John Mechalas (Intel)Pubblicato il 03/30/20150
This case study examines the architectural improvements made to the Intel® Xeon® E5 v3 processor family in order to improve the performance of the Galois/Counter Mode of AES block encryption. It looks at the impact of these improvements on the nginx* web server when backed by the OpenSSL* SSL/TLS...
Bringing SSL to Arduino* on Galileo Through wolfSSL*
Di John Mechalas (Intel)Pubblicato il 03/27/20150
A PDF version of this article, as well as a zip archive of the code samples, are available in the downloads section, below. Contents IntroductionGetting StartedStep 1: Building wolfSSL for YoctoStep 2: Installing wolfSSL On GalileoStep 3: Modifying the Compile Patterns for the Arduino IDESt...
Il processore Intel® Core™ M
Di Alexey Kostadinov (Intel)Pubblicato il 02/19/20150
This article, aimed at developers, will provide a glimpse into this 64-bit, multi-core SOC processor, with an overview of the available Intel technologies, including Intel® HD Graphics 5300.
The Intel® Core™ M Processor
Di Colleen Culbertson (Intel)Pubblicato il 09/29/20140
This article, aimed at developers, will provide a glimpse into this 64-bit, multi-core SOC processor, with an overview of the available Intel technologies, including Intel® HD Graphics 5300.
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Tecnologia Intel® Virtualization

IDF'14 Software Networking Webinars
Di Mike Pearce (Intel)Pubblicato il 01/19/20150
DATS002 - Virtualizing the Network to Enable a Software Defined Infrastructure Intel is heavily investing in products and technologies for network overlays, network function virtualization (NFV) and software defined networking (SDN) to help drive the network hardware architectural transformatio...
Intel® Hardware Accelerated Execution Manager
Di adminPubblicato il 10/24/201426
The Intel Hardware Accelerated Execution Manager (Intel® HAXM) is a hardware-assisted virtualization engine (hypervisor) that uses Intel Virtualization Technology (Intel® VT) to speed up Android app emulation on a host machine. In combination with Android x86 emulator images provided by Intel and...
Intel® Xeon® Processor E5-2600 V3 Product Family Technical Overview
Di Sreelekshmy Syamalakumari (Intel)Pubblicato il 09/12/20140
Contents 1. Executive Summary2. Introduction3. Intel Xeon processor E5-2600 V3 product family enhancements.   3.1 Intel® Advanced Vector Extensions 2 (Intel® AVX2) Instructions   3.2 Haswell New Instructions (HNI)   3.3 Support for DDR4 memory   3.4 Power Improvements4. Grantley platform im...
Getting Kernel-Based Virtual Machine (KVM) to Work with Intel® Xeon Phi™ Coprocessors
Di loc-nguyen (Intel)Pubblicato il 05/29/20140
The current Kernel-based Virtual Machine (KVM) software does not recognize the existence of Intel® Xeon Phi™ coprocessors. In order to make the KVM recognize the coprocessors, we provide patches under the GPL license, to rebuild the kernel and qemu-kvm packages. The patches provided here are used...
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How to enable virtualization in intel dual core processor E5400
Di Jonathan A.1
How to enable virtualization in intel dual core processor E5400 Please help me in doing this Mother board is DG41RQ
vt-d posted interrupts support
Di Rakesh B.0
Hello,         I have the S2600CP server board with cpu "Intel(R) Xeon(R) CPU E5-2620 v2 @ 2.10GHz" which supports for APICv, I had patched the linux kernel source 3.18.0 to support vt-d posted interrupts on direct assigned devices, Given in lkml "http://thread.gmane.org/gmane.linux.kernel.iommu/7708".         I had checked the vt-d specification document[1] that describes "Remapping hardware support for interrupt-posting capability is reported through the Posted Interrupt Support (PI) field in the Capability register (CAP_REG)", In which it returns as the posted interrupt is not supported.  The assigning the ixgbe network device is been done via VFIO assignment method.         [1] http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/vt-directed-io-spec.html         Does the above hardware support vt-d posted interrupt for direct assigned device assignment or it requires any hardware to do this.   Thanks Rakesh
Intel VT-D and Intel X99 motherboards
Di Ward H.0
Hi, I am thinking of buying a X99 motherboard that I can use for Vmware Workstation. The two brands that I am thinking of are ASUS and GigaByte. I have been looking into the Virtualization and plan on running VMWare Workstation 11.  So virtualize windows Server 2012, Windows 8.1 etc. Plus VMWare ESXi. So I think for the last one I need Vt-d. Now I have notice the the ASUS MB's have a few more options for VTD like: Vtd Azalea VCp optimizations. Interrupt Remapping Coherency Support (Non-ISoch) Coherency Support (ISoch) However the GigaByte board only allows me to turn VT-d on and off. So since I can't control these options would they be on by default on the GigaByte, is there anything 'Disadvantage' I have not being able to control them? (Or is all this a bit of a non-issue ?) BTW - I can understand people here might not know specifically about VMWare or the motherboards in question. For example I am wondering if say a board supports VT-d means that these options are inclu...
RSM and multiple cores
Di MP1
Hi all, I am trying to understand a technology that makes use of SMM in relation to hypervisors (hypercheck), and I have a number of questions about SMM in general - I hope I am posting in the right forum. I'd be interested to understand the following: 1) I know that on SMI asserting, all cores (at different interruptible boundaries) will enter SMM: are there spurious cases where SMM is triggered on only less cores? 2) The RSM instruction is said to return the processor to the not-SMM state. Does it need to be executed on every processor in SMM mode? 3) If I am in SMM mode with all my cores (i.e. I wait until them all are in SMM with a mutex), if I execute RSM from one core, does it resume normal operations (i.e. the kernel code it was executing) while the others are left in SMM mode? I am asking because the Default Treatment of RSM (33.14.2) is not exactly clear to me in Intel's doc.   Thanks in advance.    
DCBX on XL710
Di Chakravarthy N.1
Hi, I am trying to configure DCBX & ETS on Intel XL710 in Linux. Is it currently supported? dcbtool reports DCBX is not enabled and I could not find other any linux utility to configure ETS. Please let me know , if there is any config guide I can refer to to get it working. Thanks ~Chakri
Assign pages to VT-D devices
Di steven7653
Need some help understanding the theory of operation for implementing Vt-D.  I've been through the manual a couple of times.  The part I'm having trouble understanding is when we assign the page tables to the root complex structures.  How does the guest know which frames it's allowed to assign for DMA use?  The only work around I could think of is to either A do a VMCALL and ask, or B mirror the entire range the guest is allowed to access vie EPT and assign that to the root complex structure as well.     
How to Teach my processor to support hardware virtualization?
Di Aleksey C.2
  My processor (Intel Pentium dual-core T4200) does not support hardware virtualization. Can I solve the problem by any software? Thanks a lot for your advice.
How to handle GUID_ZPixelFormats in graphics card driver with Direct3D DirectDraw and DXVA under XDDM
Di Letian Yi2
Hi all: I'm developing a virtual graphics card driver under XDDM. I have finished the DirectDraw part of the driver, and i can see the DirectDraw is enabled in dxdiag. Now i'm developing the D3D part, but when i handle GUID_ZPixelFormats in DdGetDriverInfo,  DirectDraw is disabled ! Does anyone know how to handle GUID_ZPixelFormats in DdGetDriverInfo ? My code: void DdInitZPixelFormats(PDD_GETDRIVERINFODATA lpGetDriverInfo) {     static const DDPIXELFORMAT g_zfmts[] =     {         {             sizeof(DDPIXELFORMAT), DDPF_ZBUFFER, 0,             { 16 }, { 0 }, { 0x0000ffff }, { 0x00000000 }, { 0x00000000 }         },         {             sizeof(DDPIXELFORMAT), DDPF_ZBUFFER, 0,             { 32 }, { 0 }, { 0x00ffffff }, { 0x00000000 }, { 0x00000000 }         },     };     DWORD num = sizeof(g_zfmts) / sizeof(DDPIXELFORMAT);     DWORD size = sizeof(g_zfmts);     UINT8 *buf = (UINT8 *)lpGetDriverInfo->lpvData;     memcpy(buf, g_zfmts, min(lpGetDriverInfo->dwExpe...
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