Efficienza energetica

Power Management: So what is this policy thing?

Unlike a lot of previous recent blogs, this series is about power management in general. At the very end of the series, I’ll write specifically about the Intel® Xeon Phi™ coprocessor.

I have talked incessantly over the years about power states (e.g. P-states and C-states), and how the processor transitions from one state to another. For a list of previous blogs in this series, and well as other related blogs on power and power management, see the article at [List0]. But I have left out an important component of power management, namely the policy.

Performance BKMs: Introduction and Super-secret Intel Tools

At SC13 (Super Computing 2013)*, someone commented that Intel seems to have some super-secret set of tricks in its pocket, allowing us to optimize “far beyond those of mortal man”+. We don’t really have any super-secret tricks. Even if we did, we wouldn’t use them. We want mortal man (you) to be able to reproduce whatever we do. It is also in our business interest to insure that you can optimize on Intel hardware to the fullest extent possible.

Resource Guide for Intel® Xeon Phi™ Coprocessor Developers

This article makes recommendations for how a developer can get up to speed quickly on the Intel® Many Integrated Core (Intel® MIC) Architecture. This is one of three articles: For the Administrator, for the Developer, and for the Investigator. Who is a Developer? Someone who will be programming on an Intel Many Integrated Core (Intel MIC) architecture. The assumption is that they are most interested in: Brief Introduction to the Intel MIC development environment Programming models Hardware architecture Software stack Coprocessor specific drivers and tools – Intel Manycore Platform Software Stack (Intel MPSS) Compilers Libraries Tools Examples and tutorials SW Developer’s Guide Programmer’s Guide Optimization Guide Getting help and other support
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