Low Power Intel® Architecture for Small Form Factor Devices

by Ram Chary, Pat A. Correia, Raviprakash Nagaraj, and James Song

As hand-held and embedded computing devices become more powerful and as wireless connectivity becomes more pervasive, small form-factor devices will affect every aspect of our lives. But to realize this vision, we must first solve the challenge of power management, to ensure adequate power dissipation and battery life for always-on computing. Researchers at Intel are creating new power-management techniques at every system level, to make these “computer systems in miniature” a possible and practical part of our every day lives.

Version 8.0

September 2, 2004


Introduction

From the cell phone to the PDA, hand-held computing and communications devices have become a fact of everyday life. As these devices become more powerful and more versatile, and as wireless connectivity becomes more pervasive, we will depend on compact hand-held and embedded devices in almost every aspect of our lives. Tomorrow’s small form-factor devices will have more computing power than the ones we use today, and they will have new integrated capabilities such as digital signal processing or high-definition audio and video. Over time, hand-held and embedded devices will become true computer systems in miniature.

Now researchers in Intel’s Systems Technology Labs are investigating and developing power management techniques for these pocket-sized and smaller computer systems. Research is well under way at Intel to create a platform infrastructure that will deliver these new capabilities. This new low power platform infrastructure must address battery life, heat dissipation, and overall power management which are critical issues for future small form-factor, high-performance devices that must be always available and must perform in a huge variety of environments.


The Vision: Bringing Technology to Life

As the trend towards more powerful and more versatile devices continues, and as wireless connectivity becomes more pervasive, we will use hand-held and embedded devices for everything from entertainment to personal and professional creativity, from farming to healthcare. Small form-factor devices embedded in cars, shopping carts, and even refrigerators will help us organize and simplify our lives.

Today we have computers and devices that can connect to wireless networks. But today’s hand-held devices are mostly single-function: phones, pocket PCs, portable media players and game players. That single function modality will change over time. In the future, hand-held and smaller devices will have enough computing power, memory, and storage to do big jobs like speech and image recognition, analysis, and simulation and graphics rendering for activities such as high-speed gaming. Even small devices in the future will have large (relative to the device), high-quality screens, audio, imaging capabilities, and other sensing technology.

As small devices evolve to include more functionality and components, power management becomes a critical system-level issue. To realize this vision of mobile and embedded computing, we must address the system power issue on two fronts: battery life and heat dissipation. Portable devices need to minimize battery consumption so that they deliver a full day of use without recharging. Some of the newest cell phones set a standard, offering 8 to 13 hours of battery life in full-time use. The heat dissipation issue applies to both hand-held and embedded devices. Denser transistors in future devices will put out more heat, but they must not make devices too hot to hold, and an embedded device must not be so hot that it interferes with or melts other components in your car or your “smart” refrigerator.
Living with Technology

In the future, computing and communications technology will affect every aspect of our lives:
  • Family members listen to and view on-line music and video through their handheld devices while at home or on the road
  • A doctor in a remote location can review medical information with a patient, referring to information on line and showing the patient progress and recommendations for further healthcare treatment
  • Agriculturists use sensors in "smart" farmlands to monitor crops, helping them grow better crops with minimal pesticides and with the most efficient use of fertilizer, water and other resources.
  • A teenager creates an "e-diary" to save electronic memories, sights and sounds of her friends, and an artist uses a portable device to create and transmit multi-media “paintings” of a place or an event.

 


Making the Vision A Reality

Power issues are a challenge to the entire electronics industry, at all system levels, from silicon to components and software. The challenge is compounded as the system is contained in smaller and smaller enclosures. We believe that the user interface should dictate the size of a device, not the electronics or the peripherals. Our research challenge is to find a way to fit the electronic functionality and feature set into these small form factors yet still address the power and heat issues from silicon and other peripheral devices.

Silicon and Microarchitecture Foundations

The power challenge starts at the silicon level. As the transistor density increases, a semiconductor device consumes more power, generates more heat, and loses more power through leakage. Researchers at Intel are working with a number of innovative techniques to optimize power usage and control leakage at the chip level. For example, Intel’s 65 nm process generation will c ombine several advanced power-saving technologies such as new materials, sleep transistors, smaller SRAM battery cells, and second-generation strained silicon to increase performance while reducing power consumption, heat, and current leaks. Intel researchers have also developed record-setting, high-performance transistors using a new material, called high-k, for the "gate dielectric" and new metal materials for the transistor "gate." The combination of the high-k gate dielectric with the metal gate enables a drastic reduction in leakage while maintaining very high transistor performance. Other techniques such as body bias enable us to manage transistor performance, reduce leakage power, and get optimal performance for the power.

Microarchitecture techniques provide the "hooks" for system-level power management. Microarchitecture researchers at Intel are exploring new architectures that are conscious of power and thermal issues and able to manage them dynamically while running applications. Two approaches we are investigating to increase overall performance while managing power more effectively are multi-core and clustered microarchitectures and power-optimized microarchitectures. The first approach focuses on CPU cores and clusters that perform optimized load balancing through a combination of software and hardware mechanisms that dynamically examine the utilization, priority and thermal characteristics of a workload. Power optimized architecture involves using microarchitecture innovations and instruction set extensions to enhance performance and lower power usage by squeezing more useful activity into each machine instruction. We are striving to eliminate redundancy at the microarchitecture level by identifying frequent instruction sequences, extensively optimizing them, and storing them for reuse later.

Component Power

Components are a big part of the power picture for handheld devices, and Intel works with component manufacturers to maximize the efficiency of their products. For example, Intel works with the manufacturers of LCD displays to improve the efficiency of the electronics that drive the backlight. Our optics experts also provide recommendations to the industry on how to design for greater power efficiency in passing light to the front of the display. For wireless and handheld devices, we are driving toward an industry standard for very low signal swing serial interface for displays, which potentially could reduce power loss across the interface by an order of magnitude. We also invest in companies that are researching new displays for mobile systems.

System-Level Power Management

At the system level, power issues are compounded for handheld and embedded devices by the variety of system components packaged in a small form-factor, and by variable operating conditions.
For example, look at the issue of heat dissipation. Inside a handheld device there is heat generated by the computing components plus the display and hard drive (large power consumers), radio modules, and other system components such as USB, Ethernet or audio controllers. Practically speaking there is no space for fans, so the goal is to contain the thermal power in the device to a quantity that can be dissipated to the ambient environment with passive methods, so that the exterior temperature of the device never rises to uncomfortable levels. (Most people feel uncomfortable holding a device with a surface temperature of more than 50° C. At 55° C, a skin burn may occur.) The size of the device defines the amount of heat it can dissipate to the ambient for a given temperature difference between the ambient and the exterior skin of the device. Ambient temperature is set to about 25° C in most homes and offices. This means that a maximum of 25° C temperature difference is available to passively transfer heat from the device to the ambient. So for a device size of about 300 cubic centimeters (cc), the highest amount of power that can be dissipated under average conditions is about 5W. This means that the best way for us to handle heat dissipation is to carefully manage and minimize the total power consumed by the device.

The approach for battery life is the same: the more overall power consumption is minimized, the longer the battery will last. The physical weight and bulk added by packaging in sufficient battery for 8 hours of "full on" operation is usually unacceptable for hand-held and embedded devices. Therefore the strategy has to be limiting maximum power consumption based on thermal limits, and then using innovative techniques to lower the average power to extend effective operating time to 8 hours or more.

Active and Idle Power Management

Power management has two vectors: reducing active, or "in use" power consumption and reducing power consumption when a device is in an idle state. The first goal for active state power management is straightforward: every computing task must be done as efficiently as possible. We have already developed a number of techniques for managing active state power consumption. For instance, Intel has already created software developer tools such as the Intel® VTune™ performance analyzer to conserve power by optimizing software code so that it takes less time to execute a given task. With future multi-core and multi-capability microarchitectures, we will have different kinds of transistors, some high-speed ones that consumer more power and some lower-speed ones that consume less.

One focus of our systems technology research is to develop operating system support and programming tools and interfaces that allow developers to simply and quickly (and, when possible, transparently) optimize applications to take advantage of these power-saving capabilities in the microarchitecture.

The second goal of active power management is to identify which parts of the system are really active. Today, most components in a system are left running unnecessarily during active states, even when those particular components are not actually in use. We are researching adaptive, context-aware system-level power management policies to aggressively identify which system components are not being used during an active state and put them in the lowest possible power state without user intervention. Early results show a greater than 20% improvement in battery life with these techniques.

Our focus in idle state power management is to extend the definition of "idle" while improving usability. Today’s "long battery life" devices are usually optimized to consume very low power when not in use. This is easier to do when the definition of "not in use" is very cl ear. For example, a phone not being used for a phone call is not in use. For future devices that are constantly gathering or processing information, the definition may be less clear. As mentioned earlier, future devices may have more levels of “idle” than present ones. And future small devices will have more components to be active or idle.

Take for example, an MP3 player. The system might support several applications: playing music, reading e-mail, or web browsing. It will also include a variety of components: at a minimum, the CPU, a hard drive, a display, audio components, and some kind of 802.11 or other radio capabilities. Often, not all of these components and capabilities will need to be active. If the user is only listening to stored music, the display and the radio components will not be in use. If the user is browsing and not listening to music, the audio components will be idle. A system-level “Policy Manager” service could monitor the various components using device-level services and put them into a very low power state, similar to the "sleep" or "hibernate" state implemented with many of today’s devices.


Figure 1: Power Management Case Study – An MP3 Player

However, there is a usability problem with today's "hibernate" state. Many users currently bypass their computer or display’s energy-saving mode because of the 10 or 20-second delay when it resumes operation. For future small form-factor designs, a deep-sleep state with low-latency resume will be essential to user satisfaction. To improve both power management and usability for future devices, Intel researchers are developing a state we call hypernate, which will achieve power savings close to ACPI S4¹ mode but with much lower resume latency. Hypernate techniques will all more frequent use of deep-sleep states to reserve power, without requiring or provoking user interaction.

Platform-level Improvements

Other architectural design innovations are helping to lower power consumption in small form-factor platforms. For example, we are using thermal profiling to identify the power hotspots in a system design early in the process, when it is simpler and more cost-effective to improve the architecture to address thermal issues.


Figure 2: Results of Thermal Profiling

Before architecture modifications (left), heat is concentrated in the core, soak time at Win idle is 10 minutes, core is reaching 90°C, and average power consumption is 12W. After adjustments (right), heat is better distributed, soak time at Win idle is 20 minutes, core is only reaching 80°C, and average power consumption is 9W.

As one can see in the figure above thermal profiling helps to locate the thermal hotspots in the system for various workloads (applications). Profiling is a critical tool to identify where efforts can be applied for the most benefit and impact to the system design.


Powering Down for the Future

The evolution of communications and computing technology offers the promise of a more productive, more entertaining and creative future with the help of a variety of embedded and handheld computing devices. The ability to achieve this vision depends on effective power management at every level of system architecture and at every stage of component and device design. Through research and through cooperation with other researchers, component makers, system designers, and others in our industry, Intel is investigating and developing architectural innovations to minimize power consumption, extend battery life and realize the vision of pervasive technology that can improve every aspect of our lives.

About Intel’s Corporate Technology Group (CTG)
Intel employs over 7,000 R&D professionals in over 70 locations worldwide. By collaborating with key industry Fellow Travelers, universities and Intel business units, world-class research in CTG enables Intel to maintain its technology leadership and stay one generation ahead.

About the Systems Technology Labs (STL)
The Systems Technology Labs (STL) are one of four advanced research units in Intel’s Corporate Technology Group (CTG). STL partners with Intel’s product groups to deliver world-class technology and system architectures for Intel’s future silicon products.

For more information:
Please visit www.intel.com/technology/systems/stl or contact Pat Correia, Business Development Manager, Systems Technology Lab, Corporate Technology Group.

 

¹ Advanced Configuration and Power Interface "suspend to disk" mode.


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