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BIOS Update Steps

This section contains steps to flash the BIOS on your development platform for a Microsoft Windows* host computer.


The following instructions as based on the operator having a functional development platform and workstation that includes:


The onboard graphics acceleration hardware is capable of accelerating video encoding and decoding tasks. This functionality is exposed from the Video Acceleration API (vaapi) and the gstreamer-vaapi plugins.

Input and Output Interfaces

The Intel® Joule™ module offers a multitude of I/O communication protocols to control signal flow and port out those signals to the macro world. Digital I/O can be directly controlled from the kernel and more easily controlled by the MRAA library. The following communication protocols are available.

Pulse Width Modulators

The default BIOS configuration table defines four dedicated PWM outputs as PWM_0, PWM_1, PWM_2, and PWM_3, each with programmable frequency and duty cycle.

The table below shows examples of hardware (register) based PWM programming.

The PWM variables that control frequency and duty cycle are controlled by the BASE_UNIT_INT, BASE_UNIT_FRAC, and ON_TIME_DIVISOR register settings and the following equations:


PWM frequency formula:

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