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Imaging Specifications

Overview

The Imaging Processing Unit (IPU) consists of the Processing Subsystem (PS) and the Input Subsystem (IS). The Processing Subsystem is an advanced Image Signal processor (ISP). The Input Subsystem contains the MIPI CSI2 controllers. The IPU interfaces with the CMOS image sensors in the camera module through the IS and processes still and video frames in the PS.

Firmware Update on Reset

The platform can be configured to enter a BIOS update (download and execute mode) when UART2_TXD (pin 78 on connector J6) is pulled low—and held low until the de-assertion of PMIC_RESET_N.

Additional requirements for the DnX sequence to function:

  • A USB device female port, for example a micro receptacle on USB2 port 0 or the Type-C port

RTC Backup Battery

The expansion board supports a CR1225 coin cell backup battery. This backup battery is connected directly to the module and powers the module’s time management unit’s data, configuration, status registers, and timekeeping logic in the case of power loss.

USB Electrical Characteristics

The USB sub-system supports one DRD (dual-role device)/OTG (on-the-go) port, which uses separate host controller (xHCI) and device controller (xDCI) IPs. As a host, it can connect to any standard USB 1.1, 2.0, or 3.0 device. As a device, it can connect to any host and can expose various SoC capabilities based on what drivers are available. The USB interface has the following features:

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