An efficient occlusion culling algorithm targeting SIMD architectures. The algorithm supports interleaving occluder rendering and occlusion queries, and outperforms previous work by a factor 3x.
Network Function Virtualization (NFV) replaces existing networking appliances such as routers and switches, with virtualized, software-based implementations of these appliances running on standard high-volume servers (also known as Virtual Network Functions (VNFs)). By leveraging NFV, ISPs can provide a virtual Customer Premises Equipment (vCPE) solution to reduce their overall operating and maintenance costs. In this blog, which is the first of a series of three, learn how it is possible for ISPs using OpenStack, to configure the vCPE remotely, adjusting the functionality to enable a customer’s changing networking and service needs.
This article presented a fluid simulation that combines integral and differential numerical techniques to achieve an algorithm that takes time linear in the number of grid points or particles. The overall simulation can’t be faster than that because each particle has to be accessed to be rendered. It also provides better results than the treecode because the latter uses approximations everywhere in the computational domain that the Poisson solver does not, and the Poisson solver has an inherently smoother and more globally accurate solution.
With the introduction of wireless-only platforms starting with Intel Active Management Technology (Intel® AMT) 10, it is even more important for an ISV to integrate support for wireless management of AMT devices. This article will address the Intel AMT wireless configuration and describe how to handle the various aspects that are important for a clean integration.
Intel's contributions to SDN/NFV including DPDK, ONP (OPNFV), servers and network adapters, and more!
Virtual reality is rapidly gaining popularity, and may soon become a common way of viewing 3D environments. While stereo rendering has been performed on consumer grade graphics processors for a while now, the new wave of virtual reality display devices have two properties that typical applications have not needed to consider before. Pixels no longer appear on regular grids and the displays subtend a wide field-of-view. In this paper, we evaluate several techniques designed to efficiently render for head-mounted displays with such properties. We show that the amount of rendered pixels can be reduced down to 36% without compromising visual fidelity compared to traditional rendering, by rendering multiple optimized sub-projections.
In this paper, we walk through a 3D Animation algorithm example and describe some techniques and methodologies that may benefit your next vectorization endeavors. We also integrate the algorithm with SIMD Data Layout Templates (SDLT), which is a feature of Intel® C++ Compiler, to improve data layout and SIMD efficiency. Includes code sample.
Announcing a new multi-part tutorial series to help software developers integrate Intel® Software Guard Extensions (Intel® SGX) into their applications. The series will guide you through building an Intel SGX application, beginning at application design and running through development, testing, packaging, and deployment. This in-depth look at enabling Intel SGX in a single application provides developers with a hands-on and holistic view of the technology as it is woven into a real-world application.