Structure of the EU inside the GPU

Structure of the EU inside the GPU

Are the EU inside the GPU structured in the same was as the SSE or AVX registers in the conventional core ? Does anyone have any good links describing exactly what the EU are ?

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Para obter mais informações sobre otimizações de compiladores, consulte Aviso sobre otimizações.

In other the Intel 3000 GPU architecture similar to the 48 core Nvidia GT 520 or the 96 cores of Nvidia GT430.

Is there some similarity between these architectures. What is this EU thing doing in the GPU/ the SSE and AVX in theregular cores are quite simple yet this GPU EU is a puzzle.


Here are some documents that may be helpful:

These provide information on the overall GPU architecture, including the EU's.

Hope this helps!



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