I am looking at a published MPSC waitfree producer queue implementation that makes use of an atomic exchange. If I understand correctly on an intel platform this would be backed by a "lock xchg".
I am fairly fresh to this subject and trying to understand the implications. By claiming the producer is "wait-free" we are saying it has a bounded time frame in which it will complete. Is this possible with a "lock xchg"?
My understanding of a "lock xchg" is that it locks the bus somehow while it does the xchg (this is what I read somewhere). Does this mean then that the bound on time in this case is based on the number of cores on the hardware?
I.e. If all cores request to lock to do the xchg, wouldn't they then need to be queued to operate in some exclusive order?
Sorry if this is a silly question, I am fairly new to this and am just trying to understand implementations I have seen around.