This section provides reference for hardware events that can be monitored for the CPU(s):
Intel(R) Xeon Phi(TM) coprocessor
The following performance-monitoring events are supported:
Number of actual bank conflicts
Number of taken and not taken branches, including: conditional branches, jumps, calls, returns, software interrupts, and interrupt returns
Number of branch mispredictions that occurred on BTB hits. BTB misses are not considered branch mispredicts because no prediction exists for them yet.
Number of instruction reads... Last updated on 31/08/2015 - 15:31