Documentação

Intel® Math Kernel Library Cookbook de Intel® Math Kernel Library Cookbook

Última atualização em 28/05/2018 - 23:50
Article

Optimizing Memory Bandwidth in Knights Landing on Stream Triad

This document demonstrates the best methods to obtain peak memory bandwidth performance on Intel® Xeon Phi™ Processor (codenamed Knights Landing). This is done using STREAM* benchmarks, the de facto industry-standard benchmark for the measurement of computer memory bandwidth.
Criado por Karthik Raman (Intel) Última atualização em 29/07/2019 - 07:59
Article

Recipe: Building and Running YASK (Yet Another Stencil Kernel) on Intel® Processors

Yet Another Stencil Kernel (YASK), is a framework to facilitate design exploration and tuning of HPC kernels including vector folding, cache blocking, memory layout, loop construction, temporal wave-front blocking, and others.YASK contains a specialized source-to-source translator to convert scalar C++ stencil code to SIMD-optimized code.
Criado por Chuck Yount (Intel) Última atualização em 21/03/2019 - 12:00
Article

Recipe: ROME1.0/SML for the Intel® Xeon Phi™ Processor 7250

This article provides a recipe for how to obtain, compile, and run ROME1.0 SML on Intel® Xeon® processors and Intel® Xeon Phi™ processors.
Criado por Yu-Ping Z. (Intel) Última atualização em 14/06/2019 - 11:50
Article

Recipe: Building and Running MILC on Intel® Xeon® Processors and Intel® Xeon Phi™ Processors

MILC software represents a set of codes written by the MIMD Lattice Computation collaboration used to study quantum chromodynamics. This article provides instructions for code access, build and run directions for the “ks_imp_rhmc” application on Intel® Xeon® Gold and Intel® Xeon Phi™ processors for better performance on a single node.
Criado por Smahane Douyeb. (Intel) Última atualização em 14/06/2019 - 11:50
Article

Recipe: Building and Running GROMACS* on Intel® Processors

This recipe describes how to get, build, and run the GROMACS* code on Intel® Xeon® and Intel® Xeon Phi™ processors for better performance on a single node.
Criado por Smahane Douyeb. (Intel) Última atualização em 21/03/2019 - 12:08
Article

Recipe: Building and running NEMO* on Intel® Xeon Phi™ Processors

The NEMO* (Nucleus for European Modelling of the Ocean) numerical solutions framework encompasses models of ocean, sea ice, tracers, and biochemistry equations and their related physics.This recipe shows the performance advantages of using the Intel® Xeon Phi™ processor 7250.
Criado por Dmitry K. (Intel) Última atualização em 14/06/2019 - 11:50
Documentação

Frequent DRAM Accesses de Intel® VTune™ Amplifier Performance Analysis Cookbook

This recipe explores profiling a memory-bound matrix application using the Microarchitecture Exploration and Memory Access analyses of the Intel® VTune™ Amplifier to understand the cause of the frequent DRAM accesses.

Última atualização em 09/08/2019 - 12:50